Self-aligned single diffusion break isolation with reduction of strain loss

Patent metadata

Field	Value
Publication number	US-10468481-B2
Application number	US-201815875132-A
Country	US
Kind code	B2
Filing date	Jan 19, 2018
Priority date	Jan 19, 2018
Publication date	Nov 5, 2019
Grant date	Nov 5, 2019

Abstract

A methodology for forming a single diffusion break structure in a FinFET device involves localized, in situ oxidation of a portion of a semiconductor fin. Fin oxidation within a fin cut region may be preceded by the formation of epitaxial source/drain regions over the fin, as well as by a gate cut module, where portions of a sacrificial gate that straddle the fin are replaced by an isolation layer. Localized oxidation of the fin enables the stress state in adjacent, un-oxidized portions of the fin to be retained, which may beneficially impact carrier mobility and hence conductivity within channel portions of the fin.

First claim

What is claimed is:

1. A method of forming a device, comprising:
forming a plurality of fins over a semiconductor substrate;
forming a sacrificial gate structure over the fins;
forming an interlayer dielectric over the sacrificial gate structure;
planarizing the interlayer dielectric to expose the sacrificial gate structure;
forming a mask layer over the interlayer dielectric and above the sacrificial gate structure;
forming an opening in the mask layer to expose a portion of the fins;
oxidizing at least an entire cross-section of the exposed portion of the fins above the semiconductor substrate to form a single diffusion break (SDB) layer on an entire surface of the fins, wherein each SDB layer electrically separates a first portion of each fin from a second portion of each fin horizontally opposite the SDB layer; and
forming a dielectric layer over the fins after forming the SDB layer on the entire surface of each fin.

2. The method of claim 1 , further comprising forming a shallow trench isolation layer over the semiconductor substrate and over sidewalls of the fins.

3. The method of claim 2 , further comprising recessing the shallow trench isolation layer to increase a thickness of the exposed portion of the fins prior to oxidizing the fins.

4. The method of claim 1 , wherein oxidizing the fins comprises oxidizing an entire thickness of the fin.

5. A method of forming a device, comprising:
forming a fin over a semiconductor substrate;
forming a sacrificial gate structure over the fin;
forming an interlayer dielectric over the sacrificial gate structure;
planarizing the interlayer dielectric to expose the sacrificial gate structure;
forming a mask layer over the interlayer dielectric and above the sacrificial gate structure;
forming a first opening in the mask layer to expose a portion of the sacrificial gate structure;
removing the portion of the sacrificial gate structure to define a second opening and expose a portion of the fin;
oxidizing at least an entire cross-section of the exposed portion of the fin above the semiconductor substrate to form a single diffusion break (SDB) layer on an entire surface the fin, wherein the SDB layer electrically isolates a first portion of the fin adjacent the SDB layer from a second portion of the fin adjacent a horizontally opposite side of the SDB layer; and
forming a dielectric layer over the SDB layer on the entire surface of the fin.

6. The method of claim 5 , further comprising forming a shallow trench isolation layer over the semiconductor substrate and over sidewalls of the fin.

7. The method of claim 6 , further comprising recessing the shallow trench isolation layer to increase a thickness of the exposed portion of the fin prior to oxidizing the fin.

8. The method of claim 5 , wherein oxidizing the fin comprises oxidizing an entire thickness of the fin.

9. The method of claim 5 , wherein the dielectric layer substantially fills the first and second openings.

10. The method of claim 5 , wherein the oxidized portion of the fin comprises silicon dioxide and the dielectric layer comprises silicon nitride.

Assignees

• Globalfoundries Inc

Inventors

• Wang Haiting
• Zang Hui
• Wong Chun Yu
• Lim Kwan-Yong

Classifications

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014 Primary

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/13

  formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title

• H10W10/012

  using local oxidation of silicon [LOCOS] · CPC title

• H01L21/76224

  Electricity · mapped topic