Card and host apparatus

Patent metadata

Field	Value
Publication number	US-10466771-B2
Application number	US-201715820081-A
Country	US
Kind code	B2
Filing date	Nov 21, 2017
Priority date	Dec 27, 2004
Publication date	Nov 5, 2019
Grant date	Nov 5, 2019

Abstract

A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.

First claim

What is claimed is:

1. A memory card connectable to a host device and including a memory core and a memory controller, the memory controller configured to:
transmit, in response to a first command, a response of status data that is used to determine whether the card supports a termination process, the termination process including shifting into a state ready for a stop of power supply from the host device,
perform the termination process in response to a function stop command from the host device,
transmit a first signal indicative of a busy state while performing the termination process, the first signal being indicative of the busy state and having a first level, and
notify the host device of completion of the busy state by transmitting a second signal indicative of a ready state and having a second level when the memory card completes the termination process.

2. The memory card according to claim 1 , wherein
the memory core includes a nonvolatile memory and the memory card further includes a volatile memory.

3. The memory card according to claim 2 , wherein the termination process includes writing data stored in the volatile memory into the nonvolatile memory.

4. The memory card according to claim 1 , wherein the memory card is configured to change information to indicate that the termination process has not been completed when a status of the memory card has changed since completion of a latest initialization.

5. The memory card according to claim 4 , wherein the memory controller is configured to:
receive an initialization command instructing to carry out initialization,
execute initialization using a first initialization method when the information indicates that the termination process has not been completed, and
execute initialization using a second initialization method, which is finished quicker than the first initialization method, when a nonvolatile memory indicates that the termination process has been completed.

6. The memory card according to claim 5 , wherein the second initialization method comprises the first initialization method with a part of it omitted.

7. The memory card according to claim 6 , wherein the omitted part includes at least one of: checking for errors of data stored in the nonvolatile memory; restoring the errors; constructing a translation table showing a relation between logical addresses of write data and physical addresses of the nonvolatile memory which stores the write data.

Assignees

• Toshiba Memory Corp

Inventors

• Fujimoto Akihisa

Classifications

• G06K7/0008

  General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer · CPC title

• G06K7/0069

  including means for detecting correct insertion of the card, e.g. end detection switches notifying that the card has been inserted completely and correctly · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F1/3296 Primary

  by lowering the supply or operating voltage · CPC title