Circuit for inhibiting single-ended analogue signal noise, and terminal attachment

US10452591B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10452591-B2
Application numberUS-201515743540-A
CountryUS
Kind codeB2
Filing dateJul 10, 2015
Priority dateJul 10, 2015
Publication dateOct 22, 2019
Grant dateOct 22, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit inhibits single-ended analogue signal noises and can be included in a terminal accessory. The circuit includes an input interface module, a differential amplification module, an analogue signal processing module, an isolation module and a control module, wherein the input interface module at least includes an analogue signal line and a digital signal line, the differential amplification module includes differential input ends and an output end; the analogue signal line and the digital signal line of the input interface module are respectively connected to the differential input ends of the differential amplification module, so that the analogue signal line and the digital signal line form a pseudo-differential pair, and the output end of the differential amplification module is connected to the analogue signal processing module; the digital signal line is further connected to the isolation module, and the isolation module is further connected to the control module.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit for inhibiting single-ended analogue signal noises, wherein the circuit is used for connecting a host, the circuit comprises an input interface module, a differential amplification module, an analogue signal processing module, an isolation module and a control module, wherein the differential amplification module comprises differential input ends and an output end; the input interface module is respectively connected to the differential input ends of the differential amplification module through an analogue signal line and a digital signal line, and the output end of the differential amplification module is connected to the analogue signal processing module; wherein the analogue signal line is used for transmitting an analogue signal, the analogue signal is a single-ended analogue signal, and the single-end analogue signal is the analogue signal forming a loop with a ground signal; the digital signal line is used for transmitting a digital signal, and the digital signal is a control signal; the input interface module is connected to the isolation module through the digital signal line, and the isolation module is connected to the control module; the input interface module is configured to connect an interface module of the host; the differential amplification module is configured to differentially amplify a voltage difference of the differential input ends; and the analogue signal processing module is configured to process the analogue signal outputted by the output end of the differential amplification module. 2. The circuit according to claim 1 , wherein a working mode of the digital signal and the analogue signal is a simplex mode or a half-duplex mode. 3. The circuit according to claim 1 , wherein the isolation module comprises an input end, an output end and a control end, the input end is connected to the digital signal line, the output end is connected to a ground wire, and the control end is connected to the control module. 4. The circuit according to claim 1 , wherein the differential amplification module comprises a differential amplifier, the differential amplifier comprises a differential input end and an output end, the differential input end is connected to the analogue signal line and the digital signal line, and the output end is connected to the analogue signal processing module. 5. A circuit for inhibiting single-ended analogue signal noises, wherein the circuit is used for connecting a host, the circuit comprises an input interface module, a differential amplification module, an analogue signal processing module, an isolation module and a control module, and the differential amplification module comprises differential input ends and an output end; the input interface module is connected to the differential input ends of the differential amplification module through an analogue signal line and a digital signal line, and the output end of the differential amplification module is connected to the analogue signal processing module; the input interface module is connected to the isolation module through the digital signal line, and the isolation module is connected to the control module; the input interface module is used for connecting an interface module of the host; the differential amplification module is used for differentially amplifying a voltage difference of the differential input ends of the differential amplification module; and the analogue signal processing module is used for processing the analogue signal outputted by the output end of the differential amplification module. 6. The circuit according to claim 5 , wherein the analogue signal line is used for transmitting an analogue signal, the analogue signal is a single-ended analogue signal, and the single-ended analogue signal is the analogue signal forming a loop with a ground signal. 7. The circuit according to claim 5 , wherein the digital signal line is configured to transmit a digital signal, and the digital signal is a control signal. 8. The circuit according to claim 5 , wherein a working mode of the digital signal transmitted by the digital signal line and the analogue signal transmitted by the analogue signal line is a simplex mode or a half-duplex mode. 9. The circuit according to claim 5 , wherein the isolation module comprises an input end, an output end and a control end, the input end is connected to the digital signal line, the output end is connected to a ground wire, and the control end is connected to the control module. 10. The circuit according to claim 5 , wherein the differential amplification module comprises a differential amplifier, the differential amplifier comprises a differential input end and an output end, the differential input end is connected to the analogue signal line and the digital signal line, and the output end is connected to the analogue signal processing module. 11. The circuit according to claim 9 , wherein the isolation module comprises a transistor. 12. The circuit according to claim 11 , wherein the transistor is a field-effect tubctransistor, the field-effect tubctransistor comprises a grid electrode, a source electrode and a drain electrode, the grid electrode is the control end, the source electrode is the input end, and the drain electrode is the output end. 13. The circuit according to claim 11 , wherein the transistor comprises a base electrode, a collector electrode and an emitting electrode, the base electrode is the control end, the collector electrode is the input end, and the emitting electrode is the output end. 14. A terminal accessory, wherein the terminal accessory is configured to connect a terminal to the host, and the terminal accessory comprises the circuit for inhibiting single-ended analogue signal noises according to claim 5 .

Assignees

Inventors

Classifications

  • Low-frequency amplifiers, e.g. audio preamplifiers · CPC title

  • G06F13/42Primary

    Bus transfer protocol, e.g. handshake; Synchronisation · CPC title

  • with one or more immovable internal control electrodes, e.g. triode, pentode, octode · CPC title

  • in integrated circuits · CPC title

  • Differential amplifiers (differential sense amplifiers G11C7/062) · CPC title

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What does patent US10452591B2 cover?
A circuit inhibits single-ended analogue signal noises and can be included in a terminal accessory. The circuit includes an input interface module, a differential amplification module, an analogue signal processing module, an isolation module and a control module, wherein the input interface module at least includes an analogue signal line and a digital signal line, the differential amplificati…
Who is the assignee on this patent?
Hytera Comm Corp Ltd, Hytera Comm Corp Ltd
What technology area does this patent fall under?
Primary CPC classification G06F13/42. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 22 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).