Press-button circuit and driving method thereof, keypad, and display device

US10447299B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10447299-B2
Application numberUS-201715571151-A
CountryUS
Kind codeB2
Filing dateMay 5, 2017
Priority dateMay 6, 2016
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Press-button circuit and a driving method thereof are provided. A press-button circuit includes a first sampling port; a second sampling port; a common terminal; a first control device, coupled to the first sampling port and the second sampling port; at least one first press-button sub-circuit, coupled to the first sampling port and the common terminal; and at least one second press-button sub-circuit, coupled to the second sampling port and the common terminal.

First claim

Opening claim text (preview).

What is claimed is: 1. A press-button circuit, comprising: a first sampling port; a second sampling port; a common terminal; a first control device, coupled to the first sampling port and the second sampling port; a second control device, coupled to the first sampling port and the second sampling port; a first node, coupled to the first sampling port via the first control device, and coupled to the second sampling port via the second control device; m number of first press-button sub-circuits, coupled to the first sampling port and the common terminal; n number of second press-button sub-circuits, coupled to the second sampling port and the common terminal; i number of third press-button sub-circuits, coupled to the first node and the common terminal; wherein m, n, and i are integers of 1 or greater; the first control device is configured to control a connection between the first node and the first sampling port; the second control device is configured to control a connection between the first node and the second sampling port; wherein the first control device and the second control device are configured to: control the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits to form a first sampling port through a first circuit arrangement including the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits; controlling the first sampling port to use a second circuit arrangement including the m number of first press-button sub-circuits and the n number of second press-button sub-circuits, and controlling the second sampling port to use a third circuit arrangement including the i number of third press-button sub-circuits; and controlling the first sampling port to use a fourth circuit arrangement including the m number of first press-button sub-circuits, and controlling the second sampling port to use a fifth circuit arrangement including the n number of second press-button sub-circuits and the i number of third press-button sub-circuits. 2. The press-button circuit according to claim 1 , wherein: the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits are arranged in parallel with one another. 3. The press-button circuit according to claim 1 , wherein: each of the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits includes a voltage divider. 4. The press-button circuit according to claim 3 , wherein: each of the voltage dividers of any two of all of the m number of first press-button sub-circuits and the i number of third press-button sub-circuits includes a fixed-value resistor having a different resistance. 5. The press-button circuit according to claim 3 , wherein: each of the voltage dividers of any two of all of the n number of second press-button sub-circuits and the i number of third press-button sub-circuits includes a fixed-value resistor having a different resistance. 6. The press-button circuit according to claim 1 , wherein: the m number of first press-button sub-circuits includes a number of three first press-button sub-circuits, coupled to the first sampling port and the common terminal, the n number of second press-button sub-circuits includes a number of three second press-button sub-circuits, coupled to the second sampling port and the common terminal, and the i number of third press-button sub-circuits includes one third press-button sub-circuit, coupled to the first node and the common terminal. 7. The press-button circuit according to claim 1 , further comprising: a third sampling port, a third control device, a fourth control device, a second node, coupled to the third sampling port via the third control device, and coupled to at least the first sampling port via the fourth control device, wherein the second node is further coupled to the second sampling port via the first and second control devices, and at least one fourth press-button sub-circuit, coupled to the second node and the common terminal, wherein: the third control device is configured to control a connection between the second node and the third sampling port, and the fourth control device is configured to control a connection between the second node and, the first and second sampling ports. 8. The press-button circuit according to claim 1 , wherein: each of the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i numbers of third press-button sub-circuits includes a key configured in series with a fixed-value resistor. 9. The press-button circuit according to claim 1 , wherein: each of the first and second control devices includes one of a variable resistor, a switch, a transistor, and a potentiometer. 10. The press-button circuit according to claim 1 , wherein the common terminal is connected to a ground. 11. A display device, comprising: a keypad, comprising the press-button circuit according to claim 1 . 12. The display device according to claim 11 , wherein the keypad includes: a motherboard controller, including: a first general purpose input output (GPIO) port, coupled to the first sampling port, and a second general purpose input output (GPIO) port, coupled to the second sampling port, wherein: the motherboard controller is configured to provide a voltage to the common terminal. 13. A method for driving a press-button circuit, comprising: providing the press-button circuit, including: a node, coupled to a first sampling port via a first control device, and coupled to a second sampling port via a second control device; m number of first press-button sub-circuits, coupled to the first sampling port and a common terminal; n number of second press-button sub-circuits, coupled to the second sampling port and the common terminal; and i number of third press-button sub-circuits, coupled to the node and the common terminal, wherein m, n, and i are integers of 1 or greater; controlling the first and second control devices, such that the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits form a sampling port through a first circuit arrangement including the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits; controlling the first and second control devices, such that the first sampling port uses a second circuit arrangement including the m number of first press-button sub-circuits and the n number of second press-button sub-circuits, and the second sampling port uses a third circuit arrangement including the i number of third press-button sub-circuits; and controlling the first and second control devices, such that the first sampling port uses a fourth circuit arrangement including the m number of first press-button sub-circuits, and the second sampling port uses a fifth circuit arrangement including the n number of second press-button sub-circuits and the i number of third press-button sub-circuits. 14. The method according to claim 13 , wherein: each of the m number of first press-button sub-circuits, the n number of second press-button sub-circuits, and the i number of third press-button sub-circuits includes a voltage divider. 15. The method according to claim

Assignees

Inventors

Classifications

  • H03M11/24Primary

    using analogue means {, e.g. by coding the states of multiple switches into a single multi-level analogue signal or by indicating the type of a device using the voltage level at a specific tap of a resistive divider} · CPC title

  • Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes · CPC title

  • Details · CPC title

  • H03M11/20Primary

    Dynamic coding, i.e. by key scanning (H03M11/26 takes precedence) · CPC title

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What does patent US10447299B2 cover?
Press-button circuit and a driving method thereof are provided. A press-button circuit includes a first sampling port; a second sampling port; a common terminal; a first control device, coupled to the first sampling port and the second sampling port; at least one first press-button sub-circuit, coupled to the first sampling port and the common terminal; and at least one second press-button sub-…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, K Tronics Su Zhou Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03M11/24. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).