Radio frequency (RF) receiver circuit

Patent metadata

Field	Value
Publication number	US-10447206-B2
Application number	US-201715719961-A
Country	US
Kind code	B2
Filing date	Sep 29, 2017
Priority date	Sep 29, 2017
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

An integrated circuit includes a first high-pass filter having an input coupled to receive a first signal and an output coupled to a first input of a first differential pair of transistors. A second high-pass filter includes an input coupled to receive a second signal and an output coupled to a second input of the first differential pair of transistors. The second signal may be a complementary signal of the first signal. A second differential pair of transistors includes control electrodes coupled to a first voltage supply terminal. A boost circuit is coupled between the second differential pair of transistors and the first voltage supply terminal. A low-pass filter is coupled between the first differential pair of transistors and the second differential pair of transistors.

First claim

What is claimed is:

1. An integrated circuit comprising:
a first input terminal coupled to receive a first signal;
a second input terminal coupled to receive a second signal, the second signal a complementary signal of the first signal;
a first high-pass filter coupled between the first input terminal and a control electrode of a first transistor;
a second high-pass filter coupled between the second input terminal and a control electrode of a second transistor;
a third transistor having a control electrode coupled to a first voltage supply terminal and a first current electrode coupled to a first output terminal;
a fourth transistor having a control electrode coupled to the first voltage supply terminal and a first current electrode coupled to a second output terminal;
a first boost inductor having a first terminal coupled to the first output terminal;
a second boost inductor having a first terminal coupled to the second output terminal;
a first load resistor having a first terminal coupled to a second terminal of the first boost inductor, and a second terminal coupled to the first voltage supply terminal;
a second load resistor having a first terminal coupled to a second terminal of the second boost inductor, and a second terminal coupled to the first voltage supply terminal;
an output resistor coupled between the first output terminal and the second output terminal; and
a low-pass filter coupled between first current electrodes of the first and second transistors and second current electrodes of the third and fourth transistors.

2. The integrated circuit of claim 1 , wherein the first and second boost inductors are configured as a first transformer.

3. The integrated circuit of claim 1 , wherein the low-pass filter comprises:
a first capacitor having a first terminal coupled to the first current electrode of the first transistor and a second terminal coupled to the first current electrode of the second transistor;
a second capacitor having a first terminal coupled to the second current electrode of the third transistor and a second terminal coupled to the second current electrode of the fourth transistor;
a first inductor having a first terminal coupled to the first terminal of the first capacitor and a second terminal coupled to the first terminal of the second capacitor; and
a second inductor having a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the second terminal of the second capacitor.

4. The integrated circuit of claim 3 , wherein each of the first capacitor and the second capacitor is characterized as a variable capacitor.

5. The integrated circuit of claim 3 , wherein the first and second inductors are configured as a second transformer.

6. An integrated circuit comprising:
a first high-pass filter having an input coupled to receive a first signal and an output coupled to a first input of a first differential pair of transistors;
a second high-pass filter having an input coupled to receive a second signal and an output coupled to a second input of the first differential pair of transistors, the second signal a complementary signal of the first signal;
a second differential pair of transistors having control electrodes coupled to a first voltage supply terminal;
a boost circuit coupled between the second differential pair of transistors and the first voltage supply terminal;
a load resistor pair coupled between the boost circuit and the first voltage supply terminal;
an output resistor coupled between first current electrodes of the second differential pair of transistors; and
a low-pass filter coupled between the first differential pair of transistors and the second differential pair of transistors.

7. The integrated circuit of claim 6 , wherein the first differential pair of transistors is configured in a common-source arrangement.

8. The integrated circuit of claim 6 , wherein the first high-pass filter comprises a first capacitor having a first terminal coupled to the first input of the first differential pair and to a first terminal of a first resistor, a second terminal of the first resistor coupled to a second voltage supply terminal, and wherein the second high-pass filter comprises a second capacitor having a first terminal coupled to the second input of the first differential pair and to a first terminal of a second resistor, a second terminal of the second resistor coupled to the second voltage supply terminal.

9. The integrated circuit of claim 8 , wherein the second voltage supply terminal is coupled to provide a positive bias voltage.

10. The integrated circuit of claim 6 , wherein the low-pass filter comprises:
a first capacitor having a first terminal and a second terminal coupled to current electrodes of the first differential pair of transistors;
a second capacitor having a first terminal and a second terminal coupled to current electrodes of the second differential pair of transistors;
a first inductor having a first terminal coupled to the first terminal of the first capacitor and a second terminal coupled to the first terminal of the second capacitor; and
a second inductor having a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the second terminal of the second capacitor.

11. The integrated circuit of claim 10 , wherein each of the first capacitor and the second capacitor is characterized as a variable capacitor.

12. An integrated circuit comprising:
a first amplifier circuit comprising:
a first high-pass filter having an input coupled to receive a first signal and an output coupled to a first input of a first differential pair of transistors;
a second high-pass filter having an input coupled to receive a second signal and an output coupled to a second input of the first differential pair of transistors, the second signal a complementary signal of the first signal;
a second differential pair of transistors having control electrodes coupled to a first voltage supply terminal;
a boost circuit coupled between the second differential pair of transistors and the first voltage supply terminal; and
a low-pass filter coupled between the first differential pair of transistors and the second differential pair of transistors;

a low noise amplifier (LNA) circuit coupled to receive a radio frequency signal; and
a first mixer circuit having a first differential input coupled to a differential output of the LNA circuit, and a first differential output coupled to inputs of the first and second high-pass filters of the first amplifier circuit.

13. The integrated circuit of claim 12 , wherein the first high-pass filter of the first amplifier circuit comprises a first capacitor having a first terminal coupled to the first input of the first differential pair and to a first terminal of a first resistor, a second terminal of the first resistor coupled to a second voltage supply terminal, and wherein the second high-pass filter of the second amplifier circuit comprises a second capacitor having a first terminal coupled to the second input of the first differential pair and to a first terminal of a second resistor, a second terminal of the second resistor coupled to the second voltage supply terminal.

14. The integrated circuit of claim 12 , wherein the low-pass filter of the first amplifier circuit comprises:
a first capacitor having a first terminal and a second terminal coupled to current electrodes of the first differential pair of transistors;
a second capacitor having a first terminal and a second terminal coupled to current electrodes of the second differential pair

Assignees

• Nxp Usa Inc

Inventors

• Lee Jaeyoung
• Rohani Nader

Classifications

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• H03F2203/45394

  the AAC of the dif amp comprising FETs whose sources are not coupled, i.e. the AAC being a pseudo-differential amplifier · CPC title