Correlated electron switch structures and applications

Patent metadata

Field	Value
Publication number	US-10446609-B2
Application number	US-201815984223-A
Country	US
Kind code	B2
Filing date	May 18, 2018
Priority date	Sep 20, 2016
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

Subject matter disclosed herein may relate to devices formed from correlated electron material.

First claim

What is claimed is:

1. A method comprising:
etching at least a portion of a substrate to form a first cavity exposing at least a portion of a first metal layer; and
forming one or more layers of correlated electron material (CEM) over the cavity to form a CEM structure at least partially filling the cavity,
wherein at least one of the one or more layers of CEM forms a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region, and wherein the switching region comprises a continuous switching region and at least two of the one or more layers form at least two conductive regions.

2. The method of claim 1 , and further comprising depositing one or more layers of an electrode material over the cavity prior to the forming of the one or more layers of the CEM over the cavity.

3. The method of claim 2 , wherein the electrode material comprises titanium nitride, platinum, titanium, copper, aluminum, cobalt, nickel, tungsten, tungsten nitride, cobalt silicide, ruthenium oxide, chromium, gold, palladium, indium tin oxide, tantalum, silver or iridium, or any combination thereof.

4. The method of claim 1 , wherein the one or more layers of CEM forms two or more discontinuous switching regions and at least two of the one or more layers forms at least two conductive regions.

5. The method of claim 4 , wherein the two or more discontinuous switching regions comprise intrinsic CEM and the two or more conductive regions comprise p-type doped CEM.

6. The method of claim 4 , wherein the two or more discontinuous switching regions comprise p-type doped CEM and the two or more conductive regions comprise intrinsic CEM.

7. The method of claim 1 , and further comprising forming a second metal layer over the CEM structure.

8. The method of claim 1 , wherein forming the one or more layers of the CEM over the cavity to form a CEM structure at least partially filling the cavity further comprises depositing the one or more layers of CEM over the cavity.

9. A method comprising:
etching at least a portion of a substrate to form a first cavity exposing at least a portion of a first metal layer;
forming one or more layers of correlated electron material (CEM) over the cavity to form a CEM structure at least partially filling the cavity;
etching a second cavity in the CEM structure; and
forming a metal structure in the second cavity at least partially filling the second cavity, wherein at least one of the one or more layers of CEM forms a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region.

10. A device comprising:
a first metal layer;
a substrate disposed on the first metal layer comprising a first cavity exposing at least a portion of the first metal layer; and
a correlated electron material (CEM) structure disposed in the cavity, the CEM structure at least partially filling the cavity, comprising one or more layers of CEM disposed on at least the exposed portion of the first metal layer, wherein at least one of the one or more layers of CEM comprises a switching region that is switchable between impedance states based, at least in part, on a concentration of electrons in the switching region, and wherein the switching region comprises a continuous switching region and at least two of the one or more layers form at least two conductive regions.

11. The device of claim 10 , and further comprising a second metal layer formed on the CEM structure.

12. The device of claim 10 , and further comprising a metal structure disposed in a second cavity disposed in the CEM structure.

13. The device of claim 10 , and further comprising one or more layers of an electrode material disposed between at least a portion of the one or more layers of CEM and the first metal layer.

14. The device of claim 13 , wherein the electrode material comprises titanium nitride, platinum, titanium, copper, aluminum, cobalt, nickel, tungsten, tungsten nitride, cobalt silicide, ruthenium oxide, chromium, gold, palladium, indium tin oxide, tantalum, silver or iridium, or any combination thereof.

15. The device of claim 10 , wherein the switching region comprises a continuous switching region and at least two of the one or more layers comprise at least two conductive regions.

16. The device of claim 10 , wherein the one or more layers of CEM comprise two or more discontinuous switching regions, and at least two of the one or more layers comprise at least two conductive regions.

17. The device of claim 16 , wherein the two or more discontinuous switching regions comprise intrinsic CEM and the two or more conductive regions comprise p-type doped CEM.

18. The device of claim 16 , wherein the two or more discontinuous switching regions comprise p-type doped CEM and the two or more conductive regions comprise intrinsic CEM.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Shifren Lucian
• Reid Kimberly Gay
• Yeric Gregory Munson

Classifications

• H01L45/1226

  Electricity · mapped topic

• H01L45/146

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L45/04

  Electricity · mapped topic

• H01L27/2436 Primary

  Electricity · mapped topic