Circuit switch pre-reservation in an on-chip network

US10445287B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10445287-B2
Application numberUS-201314400557-A
CountryUS
Kind codeB2
Filing dateSep 12, 2013
Priority dateSep 12, 2013
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Techniques described herein generally include methods and systems related to circuit switching in a network-on-chip. According to embodiments of the disclosure, a network-on-chip may include routers configured to pre-reserve circuit-switched connections between a source node and a destination node before requested data are available for transmission from the source node to the destination node. Because the circuit-switched connection is already established between the source node and the destination node when the requested data are available for transmission from the source node, the data can be transmitted without the delay or with reduced delay caused by setup overhead of the circuit-switched connection. A connection setup message may be transmitted together with a memory request from the destination node to facilitate pre-reservation of the circuit-switched connection.

First claim

Opening claim text (preview).

I claim: 1. A network on chip (NoC), comprising: one or more memory controllers configured to manage data flow from a main memory associated with the NoC; a source node that includes: a processor core with an associated cache hierarchy; and a source router, wherein the source router includes: a crossbar switch; and a routing and arbitration controller; and a destination node communicatively coupled to the source node, wherein the destination node includes: a processor core with an associated cache hierarchy; a network device; and a destination router, wherein the destination router includes: a crossbar switch; and a routing and arbitration controller, wherein the destination router is configured to: receive a memory request from the network device for data to be transferred from the source node to the destination node; and transmit a connection setup message and the memory request to the source node, wherein the connection setup message and the memory request are transmitted as a combined message, wherein the memory request includes one or more physical memory addresses that correspond to a particular portion of the main memory from which the data, to be transferred from the source node to the destination node, is to be fetched by the source node, wherein the particular portion of the main memory is accessed by at least one of the one or more memory controllers, wherein the connection setup message includes at least one command effective to pre-reserve a circuit-switched connection to transfer the data from the source node to the destination node and effective to pre-reserve the source router for the pre-reserved circuit-switched connection, and wherein the at least one command effective to pre-reserve the source router comprises a first command effective to pre-reserve the source router for a first time period during which the source router is made unavailable for data transmission requested by a first node that is outside of the pre-reserved circuit-switched connection. 2. The NoC of claim 1 , further comprising an intermediary node that is between the source node and the destination node, wherein the intermediary node includes an intermediary router, and wherein the at least one command included in the connection setup message is further effective to pre-reserve the intermediary router for the pre-reserved circuit-switched connection. 3. The NoC of claim 1 , wherein the destination router includes a reservation register configured to track pre-reservation of the destination router over a specific period of time. 4. The NoC of claim 3 , wherein the specific period of time is tracked in terms of clock cycles, and wherein the reservation register includes multiple bits that each track pre-reservation of the destination router for a particular set of clock cycles associated with the NoC. 5. The NoC of claim 3 , wherein the specific period of time is based at least, in part, on a longest round-trip communication time that occurs between a particular node of the NoC and a memory controller coupled to the NoC. 6. The NoC of claim 3 , wherein the specific period of time is based at least, in part, on a shortest round-trip communication time that occurs between a particular node of the NoC and a memory controller coupled to the NoC. 7. The NoC of claim 1 , wherein the connection setup message includes a pre-reservation window that indicates a requested period of time to use the destination router. 8. The NoC of claim 7 , wherein the pre-reservation window includes a safety margin based at least, in part, on at least one of an uncertainty in availability of the data at the source node and an uncertainty in transmission time of the connection setup message from the destination node to the source node. 9. The NoC of claim 7 , wherein the destination router is further configured to compute the pre-reservation window based at least, in part, on an estimated time of availability of the data at the source node. 10. The NoC of claim 7 , further comprising: an intermediary node that is located along a circuit-switched path between the source node and the destination node, wherein the intermediary node includes an intermediary router, wherein the connection setup message includes a second command effective to pre-reserve the intermediary router, and wherein the destination router is further configured to determine a pre-reservation window for the intermediary router based at least, in part, on an estimated time of availability of the data at the source node. 11. The NoC of claim 7 , wherein the pre-reservation window is based on one or more of a quantity of data associated with the memory request and a transmission time between the source node and the destination node. 12. A network on chip (NoC), comprising: one or more memory controllers configured to manage data flow from a main memory associated with the NoC; and a node, wherein the node includes: a processor core with an associated cache hierarchy; and a router disposed at the node, wherein the router includes: a crossbar switch; and a routing and arbitration controller, wherein the router is configured to: receive a connection setup message that originates from a destination node of the NoC, wherein the connection setup message includes a reservation window that indicates a requested time frame to use the router in a circuit-switched connection for data to be transferred from a source node to the destination node; receive a memory request from the destination node of the NoC, wherein the memory request includes one or more physical memory addresses that correspond to a particular portion of the main memory from which the data, to be transferred from the source node to the destination node, is to be fetched, wherein the particular portion of the main memory is accessed by at least one of the one or more memory controllers, and wherein the memory request is generated in response to a cache miss experienced by a network device located at the destination node or in response to a prefetch request executed by the network device; determine availability of the router for use in the circuit-switched connection during the requested time frame; and in response to a determination that the router is available during the requested time frame, reserve the router for use in the circuit-switched connection during the requested time frame, and transmit the connection setup message to the source node, wherein while the router is reserved for use during the requested time frame, the router is made unavailable for data transmission requested by a first node that is outside of the circuit-switched connection. 13. The NoC of claim 12 , wherein the router is configured to transmit the connection setup message and an acknowledgement message to the source node, and wherein the source node is referenced in the connection setup message. 14. The NoC of claim 12 , wherein the router is configured to add an acknowledgement message to the connection setup message and to transmit the acknowledgement message and the connection setup message as a single message. 15. The NoC of claim 12 , wherein the circuit-switched connection comprises a circuit-switched connection between the source node and the destination node, and wherein the circuit-switched connection follows a same route in the NoC, but in an opposite direction, as that followed by the connection setup message. 16. The NoC of claim 12 , further comprising other routers configured to perform circuit switching and packet switching. 17. A method to transmit data in a net

Assignees

Inventors

Classifications

  • Globally asynchronous, locally synchronous, e.g. network on chip · CPC title

  • G06F15/167Primary

    using a common memory, e.g. mailbox · CPC title

  • using establishment or release of connections between ports · CPC title

  • Router architectures · CPC title

  • Cross-Sectional Technologies · mapped topic

Patent family

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What does patent US10445287B2 cover?
Techniques described herein generally include methods and systems related to circuit switching in a network-on-chip. According to embodiments of the disclosure, a network-on-chip may include routers configured to pre-reserve circuit-switched connections between a source node and a destination node before requested data are available for transmission from the source node to the destination node.…
Who is the assignee on this patent?
Empire Technology Dev Llc
What technology area does this patent fall under?
Primary CPC classification G06F15/167. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).