Method to consistently store large amounts of data at very high speed in persistent memory systems

Patent metadata

Field	Value
Publication number	US-10445236-B2
Application number	US-201615350428-A
Country	US
Kind code	B2
Filing date	Nov 14, 2016
Priority date	Nov 14, 2016
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

A thread on a processor core executes one or more instructions to write file data for a file into a persistent memory save area. The instructions to write the file data have the effect of storing the file data for the file in the cache associated with the processor core. The thread running on the processor core flushes the file data from the cache to the persistent memory save area while retaining the file data in the cache. The thread running on the processor core copies the file data from the cache for the processor core into a persistent copy of the file that is stored in persistent memory.

First claim

What is claimed is:

1. A device comprising:
a non-transitory memory storage comprising one or more instructions;
a persistent memory storage device that stores a persistent first copy of a file;
a processor core in communication with the non-transitory memory storage and the persistent memory storage device;
a cache memory associated with the processor core; and
a persistent memory including a persistent memory save area;
wherein a thread running on the processor core is configured by the one or more instructions to perform operations comprising:
storing file data for a file in the cache memory;
flushing the file data from the cache memory to the persistent memory save area while retaining the file data in the cache memory to generate a second copy of the data file from the cache memory in the persistent memory save area; and
copying the file data into the persistent first copy of the file that is stored in the persistent memory storage device.

2. The device of claim 1 , wherein:
the storing of the file data for the file in the cache memory is an effect of performing an operation to write the file data to the persistent first copy of the file in the persistent memory storage device; and
the operations further comprise:
prior to the performing of the operation to write the file data to the persistent first copy of the file in the persistent memory storage device, preventing interrupts and other threads from running on the processor core, so that only the thread runs on the processor core.

3. The device of claim 2 , wherein the operations further comprise:
after copying the file data into the persistent first copy of the file in the persistent memory storage device, restoring the ability of interrupts and other threads to run on the processor core.

4. The device of claim 1 , wherein the operations further comprise:
after copying the file data into the persistent first copy of the file in the persistent memory storage device, removing the file data from the cache memory.

5. The device of claim 1 , wherein the cache memory includes a memory buffer.

6. The device of claim 1 , wherein:
the cache memory includes a level 1 (L1) cache; and
the operations further comprise:
flushing, by the thread running on the processor core, additional file data of the file from a level 2 (L2) cache to memory while retaining the additional file data of the file in the L2 cache; and
copying, by the thread running on the processor core, the additional file data of the file from the L2 cache into the persistent first copy of the file that is stored in persistent memory storage device.

7. The device of claim 1 , wherein the flushing of the file data from the cache memory to the persistent memory while retaining the file data in the cache memory includes copying data in the cache memory to generate the second copy of the file in the persistent memory using a peripheral component interconnect express (PCI-E) device without altering the data in the cache memory.

8. The device of claim 1 , wherein the persistent memory is a storage class memory (SCM).

9. The device of claim 1 , wherein the persistent memory is a non-volatile dual in-line memory module (NVDIMM).

10. The device of claim 1 , wherein the operations further comprise:
copying instructions for performing the storing and flushing into an instruction cache memory for the processor core, and
locking the copied instructions.

11. The device of claim 1 , further comprising:
a power backup coupled to the processor core; and
wherein the operations further comprise:
detecting a failure of primary power for the processor core; and
saving content from the cache memory in response to the detected failure of primary power.

12. The device of claim 11 , wherein:
the processor core is one of a plurality of processor cores; and
a second thread running on a second processor core of the plurality of processor cores is configured by the one or more instructions to perform operations comprising:
copying second file data from a data cache memory for the second processor core into the persistent first copy of the file that is stored in the persistent memory storage device in response to the detected failure of primary power.

13. The device of claim 1 , wherein:
the processor core is one of a plurality of processor cores; and
each processor core of the plurality of processor cores has a distinct associated persistent memory save area in the persistent memory.

14. A computer-implemented method for storing data in persistent memory comprising:
by a thread running on a processor core, storing file data for a file in a cache memory associated with the processor core;
flushing, by the thread running on the processor core, the file data from the cache memory to a persistent memory save area of a persistent memory while retaining the file data in the cache memory to generate a second copy of the data file from the cache memory in the persistent memory save area; and
copying, by the thread running on the processor core, the file data into a persistent first copy of the file that is stored in a persistent memory storage device.

15. The computer-implemented method of claim 14 , wherein:
the storing of the file data for the file in the cache memory is an effect of an operation to write the file data for the file into the persistent memory save area; and
the method further comprises:
prior to the operation to write the file data for the file into the persistent memory save area, preventing interrupts and other threads from running on a processor core, so that only the thread runs on the processor core.

16. The computer-implemented method of claim 15 , further comprising:
after copying the file data into the persistent first copy of the file in the persistent memory storage device, restoring the ability of interrupts and other threads to run on the processor core.

17. The computer-implemented method of claim 14 , further comprising:
after copying the file data into the persistent first copy of the file in the persistent memory storage device, removing the file data from the cache memory.

18. The computer-implemented method of claim 14 , wherein the cache memory includes a memory buffer.

19. The computer-implemented method of claim 14 , wherein:
the cache memory includes a level 1 (L1) cache; and
the method further comprises:
flushing, by the thread running on the processor core, additional file data of the file from a level 2 (L2) cache to memory while retaining the additional file data of the file in the L2 cache; and
copying, by the thread running on the processor core, the additional file data of the file from the L2 cache into the persistent first copy of the file that is stored in persistent memory storage device.

20. A non-transitory computer-readable media storing one or more computer instructions, that when executed by a processor, cause the processor to perform the steps of:
by a thread running on a processor core of the processor, storing file data for a file in a cache memory associated with the processor core;
flushing, by the thread running on the processor core, the file data from the cache memory to a persistent memory save area of a persistent memory while retaining the file data in the cache memory to generate a second copy of the file data from the cache memory in the persistent memory save area; and
copying, by the thread running on the processor core, the file data into a persistent first copy of the file that is stored in a persistent

Assignees

• Futurewei Technologies Inc

Inventors

• Boyle Thomas

Classifications

• G06F12/0897

  with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title

• G06F12/084

  with a shared cache · CPC title

• G06F12/0842

  for multiprocessing or multitasking · CPC title

• G06F2212/1016

  Performance improvement · CPC title

• G06F2212/452

  Instruction code · CPC title