Communications system using hybrid common mode choke and kelvin sensing of voltage

US10444823B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10444823-B2
Application numberUS-201715653058-A
CountryUS
Kind codeB2
Filing dateJul 18, 2017
Priority dateJul 25, 2016
Publication dateOct 15, 2019
Grant dateOct 15, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In a communications system that conducts differential data via a pair of wires, AC common mode noise is undesirably coupled to the wires in a noisy environment. A hybrid common mode choke (HCMC) attenuates the AC common mode noise while passing the differential data to a PHY. The HCMC includes a CMC (windings with the same polarity) and a differential mode choke (windings with opposite polarities). The CMC attenuates the AC common mode noise, and the DMC passes the attenuated AC common mode noise to termination circuity to eliminate it. Also disclosed is a technique for Kelvin sensing the DC voltage at the pair of wires, in a PoDL system, by detecting the voltage on wires that do not carry DC current, so as to provide a more accurate measurement.

First claim

Opening claim text (preview).

What is claimed is: 1. A Power over Data Lines (PoDL) system comprising: a pair of wires carrying differential data and a DC voltage; a Power Sourcing Equipment (PSE) providing the DC voltage to the pair of wires via a DC-coupling circuit; a common mode choke (CMC) coupled between the pair of wires and a transceiver, the CMC comprising a transformer with two windings having the same polarity, wherein the CMC attenuates AC common mode signals on the pair of wires and substantially passes the differential data; termination circuitry coupled between the CMC and the pair of wires, the termination circuitry comprising a first resistor coupled to a first wire of the pair of wires, wherein the first resistor is coupled to ground via a first capacitor, the termination circuity further comprising a second resistor coupled to a second wire of the pair of wires, wherein the second resistor is coupled to the ground via a second capacitor; a first conductor coupled to a first node between the first resistor and the first capacitor; a second conductor coupled to a second node between the second resistor and the second capacitor; and the first conductor and the second conductor being coupled to a voltage sensor for detecting the DC voltage applied to the pair of wires. 2. The system of claim 1 wherein the PSE is coupled between the CMC and the transceiver via the DC-coupling circuitry. 3. The system of claim 2 wherein the DC-coupling circuitry comprises one or more inductors. 4. The system of claim 2 wherein the DC-coupling circuitry comprises a differential mode choke (DMC) coupled between the CMC and the transceiver, the DMC comprising a transformer with two windings having opposite polarities, wherein the DMC substantially passes the AC common mode signals that pass through the CMC from the pair of wires. 5. The system of claim 1 wherein the voltage sensor is located within the PSE. 6. The system of claim 1 wherein the voltage sensor comprises an analog-to-digital converter. 7. The system of claim 1 wherein the first conductor and the second conductor provide a Kelvin connector to the pair of wires for detecting the DC voltage applied to the pair of wires. 8. The system of claim 1 further comprising a Powered Device (PD) coupled to the pair of wires via additional DC-coupling circuitry. 9. The system of claim 8 wherein the additional DC-coupling circuitry comprises one or more inductors. 10. The system of claim 1 wherein the DC-coupling circuitry comprises a differential mode choke (DMC) coupled between the PSE and the pair of wires, the DMC comprising a transformer with two windings having opposite polarities. 11. A method performed by a Power over Data Lines (PoDL) system comprising: carrying differential data and a DC voltage over a pair of wires; providing the DC voltage to the pair of wires via a DC-coupling circuit; attenuating AC common mode signals on the pair of wires and substantially passing the differential data using a common mode choke (CMC) coupled between the pair of wires and a transceiver, the CMC comprising a transformer with two windings having the same polarity; terminating the pair of wires using termination circuitry coupled between the CMC and the pair of wires, the termination circuitry comprising a first resistor coupled to a first wire of the pair of wires, wherein the first resistor is coupled to ground via a first capacitor, the termination circuity further comprising a second resistor coupled to a second wire of the pair of wires, wherein the second resistor is coupled to the ground via a second capacitor; and detecting the DC voltage applied to the pair of wires by a voltage sensor coupled to a first conductor and a second conductor, wherein the first conductor is coupled to a first node between the first resistor and the first capacitor, and the second conductor is coupled to a second node between the second resistor and the second capacitor. 12. A circuit in a Power over Data Lines (PoDL) system, the circuit comprising: a Power Sourcing Equipment (PSE) configured for providing a DC voltage to a pair of wires via a DC-coupling circuit, where the pair of wires also carries differential data; a common mode choke (CMC) configured for being coupled between the pair of wires and a transceiver, the CMC comprising a transformer with two windings having the same polarity, wherein the CMC attenuates AC common mode signals on the pair of wires and substantially passes the differential data; termination circuitry configured to be coupled between the CMC and the pair of wires, the termination circuitry comprising a first resistor coupled to a first wire of the pair of wires, wherein the first resistor is coupled to ground via a first capacitor, the termination circuity further comprising a second resistor coupled to a second wire of the pair wires, wherein the second resistor is coupled to the ground via a second capacitor; a first conductor coupled to a first node between the first resistor and the first capacitor; a second conductor coupled to a second node between the second resistor and the second capacitor; and the first conductor and the second conductor being coupled to a voltage sensor for detecting the DC voltage applied to the pair of wires. 13. The circuit of claim 12 wherein the DC-coupling circuitry comprises a differential mode choke (DMC) coupled between the CMC and the transceiver, the DMC comprising a transformer with two windings having opposite polarities, wherein the DMC substantially passes the AC common mode signals that pass through the CMC from the pair of wires. 14. The circuit of claim 12 wherein the voltage sensor is located within the PSE. 15. A circuit in a Power over Data Lines (PoDL) system, the PoDL system including a Power Sourcing Equipment (PSE) configured for providing a DC voltage to a pair of wires, where the pair of wires also carries differential data, the circuit comprising: a Powered Device (PD) configured to be powered by the DC voltage; a common mode choke (CMC) configured for being coupled between the pair of wires and a transceiver, the CMC comprising a transformer with two windings having the same polarity, wherein the CMC attenuates AC common mode signals on the pair of wires and substantially passes the differential data; termination circuitry configured to be coupled between the CMC and the pair of wires, the termination circuitry comprising a first resistor coupled to a first wire of the pair of wires, wherein the first resistor is coupled to ground via a first capacitor, the termination circuity further comprising a second resistor coupled to a second wire of the pair of wires, wherein the second resistor is coupled to the ground via a second capacitor; a first conductor coupled to a first node between the first resistor and the first capacitor; a second conductor coupled to a second node between the second resistor and the second capacitor; and the first conductor and the second conductor being coupled to a voltage sensor for detecting the DC voltage applied to the PD via the pair of wires. 16. The circuit of claim 15 wherein the voltage sensor is located within the PD. 17. The method of claim 11 wherein the DC-coupling circuit comprises a differential mode choke (DMC) coupled between power sourcing equipment and the pair of wires, the DMC comprising a transformer with two windings having opposite polarities. 18. The circuit of claim 12 further comprising a Powered Device (PD) coupled to the pair of wires via a DC de-coupling circuit. 19. The

Assignees

Inventors

Classifications

  • Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling · CPC title

  • G06F1/3296Primary

    by lowering the supply or operating voltage · CPC title

  • via DC power distribution · CPC title

  • Provision for current-mode coupling · CPC title

  • the power on the line being DC (arrangements for feeding power H04L12/10; extracting feeding power from signals H04L25/02) · CPC title

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What does patent US10444823B2 cover?
In a communications system that conducts differential data via a pair of wires, AC common mode noise is undesirably coupled to the wires in a noisy environment. A hybrid common mode choke (HCMC) attenuates the AC common mode noise while passing the differential data to a PHY. The HCMC includes a CMC (windings with the same polarity) and a differential mode choke (windings with opposite polariti…
Who is the assignee on this patent?
Linear Tech Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/3296. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 15 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).