Device for measuring the current flowing in an inductive load

Patent metadata

Field	Value
Publication number	US-10444264-B2
Application number	US-201916262521-A
Country	US
Kind code	B2
Filing date	Jan 30, 2019
Priority date	May 6, 2016
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.

First claim

The invention claimed is:

1. An electronic device, comprising:
a first node configured to receive a first supply voltage and configured to be coupled to a first terminal of an inductive load;
a second node configured to be coupled to a second terminal of the inductive load;
a third node configured to receive a second supply voltage;
a switching circuit coupled to the first, second and third nodes, the switching circuit configured to couple the first node to the second node in a first operating mode and to couple the second node to the third node in a second operating mode;
a current sensing circuit coupled to the switching circuit, the current sensing circuit configured to sense a first current between the first node and the second node in the first operating mode and to generate a first sensed current signal based on the sensed first current, and configured to sense a second current between the second node and the third node in the second operation mode and to generate a second sensed current signal based on the sensed second current;
an output circuit coupled to the current sensing circuit and configured to generate an error signal based on a difference between the first sensed current signal and the second sensed current signal, and configured to generate a failure signal based on the error signal.

2. The electronic device of claim 1 , wherein the output circuit comprises a subtraction circuit configured to subtract the first sensed current signal from the second sensed current signal to generate the error signal.

3. The electronic device of claim 2 , wherein the output circuit comprises window comparator configured to generate the failure signal in response to the error signal, a first threshold value, and a second threshold value.

4. The electronic device of claim 3 , wherein the output circuit further comprises a first sample and hold circuit and a second sample and hold circuit.

5. The electronic device of claim 4 , wherein the first sample and hold circuit is configured to receive a first clock signal and the second sample and hold circuit is configured to receive a second clock signal, the first clock signal being delayed relative to the first clock signal.

6. The electronic device of claim 5 , wherein the first sample and hold circuit is coupled to receive first sensed current signal and the second sample and hold is coupled to receive the second sensed current signal.

7. The electronic device of claim 6 , wherein each of the first and sensed current signals is an analog signal, and wherein the output circuit further comprises first and second analog-to-digital converters configured to convert the first and second sensed current signals into first and second digital sensed current signals, respectively.

8. The electronic device of claim 1 , wherein the switching circuit comprises:
a first transistor including a first signal node coupled to the first node and a second signal node coupled to the second node, and including a control node configured to receive a first control signal; and
a second transistor including a first signal node coupled to the second node and a second signal node coupled to the third node, and including a control node configured to receive a second control signal.

9. The electronic device of claim 8 , further comprising a first resistive element coupled between the second signal node of the first transistor and the second node and a second resistive element couple between the second node the first signal node of the second transistor.

10. The electronic device of claim 8 , wherein the current sensing circuit comprises:
a first current sensing amplifier coupled to the first and second signal nodes of the first transistor;
a second current sensing amplifier coupled to the first and second signal nodes of the second transistor.

11. The electronic device of claim 8 , wherein the first transistor and the second transistor are power N-channel MOSFET transistors.

12. The electronic device of claim 1 , wherein the first supply voltage is a positive voltage and the second supply voltage is a negative voltage, or the first supply voltage is a negative voltage and the second supply voltage is a positive voltage.

13. The electronic device of claim 1 , wherein the output circuit is configured to generate the error signal at a maximum current peak of each of the first and second sensed current signals occurring at passage from conduction of the second transistor to conduction of the first transistor.

14. The electronic device of claim 1 , wherein the output circuit is configured to generate the error signal at a minimum current peak of each of the first and second sensed current signals occurring at passage from conduction of the first transistor to conduction of the second transistor.

15. An electronic device, comprising:
a first node configured to receive a first supply voltage and configured to be coupled to a first terminal of an inductive load;
a second node configured to be coupled to a second terminal of the inductive load;
a third node configured to receive a second supply voltage;
a switching circuit coupled to the first, second and third nodes, the switching circuit configured to alternately couple the first node to the second node and the second node to the third node;
a current sensing circuit coupled to the switching circuit, the current sensing circuit configured to sense a first current between the first node and the second node and to sense a second current between the second node and the third node;
a circuit coupled to the current sensing circuit and configured to generate an error signal based on a difference between the sensed first and second currents and configured to generate a failure signal based upon the error signal.

16. The electronic device of claim 15 , wherein the circuit is configured to activate the failure signal responsive to the error signal exceeding a threshold value.

17. The electronic device of claim 15 , wherein the threshold value is a window defined by a first threshold value and a second threshold value.

18. A method, comprising:
applying a supply voltage to a first node;
coupling the first node to a second node;
sensing a first current flowing through an inductive load coupled to the first and second nodes and between the first node and the second node;
applying a reference voltage to a third node;
sensing a second current flowing through the inductive load and between the second node and the third node;
generating a current error signal based on the difference between the sensed first current and the sensed second current; and
generating a failure signal based upon the error signal having a value outside a window defined by a first threshold value and a second threshold value.

19. The method of claim 18 , wherein generating the failure signal comprises activating the failure signal in response to the error signal having a value outside a window defined by a first threshold value and a second threshold value.

20. The method of claim 18 , wherein sensing the first current flowing comprises sensing the first current a delay time after coupling the first node to the second node and wherein sensing the second current flowing comprises sensing the second current before coupling the first node to the second node.

Assignees

• St Microelectronics Srl

Inventors

• Poletto Vanni
• Miglierina Riccardo
• Leone Antonio Davide
• Lecce Sergio

Classifications

• G01R31/343 Primary

  in operation · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2200/462

  the current being sensed · CPC title

• G11C27/02

  Sample-and-hold arrangements (G11C27/04 takes precedence) · CPC title

• G01R19/1659 Primary

  to indicate that the value is within or outside a predetermined range of values (window) (G01R19/16514, G01R19/16519, G01R19/16528 and G01R19/16533 take precedence) · CPC title