Image sensor and electronic device

US10440304B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10440304-B2
Application numberUS-201515025179-A
CountryUS
Kind codeB2
Filing dateAug 14, 2015
Priority dateAug 26, 2014
Publication dateOct 8, 2019
Grant dateOct 8, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An image sensor according to a first aspect of the present disclosure includes analog digital converters (ADCs), each of the ADCs being provided for a column, wherein the ADCs associated with the respective columns are configured to read charge signals simultaneously from pixels arranged on lines different from one another of the respectively associated columns, the number of ADCs being a predetermined number corresponding to the number of columns, the columns being adjacent to one another. The present disclosure is applicable to any electronic device including an image sensor.

First claim

Opening claim text (preview).

The invention claimed is: 1. An image sensor, comprising: a plurality of lines; and a plurality of analog digital converters (ADCs), wherein each ADC of the plurality of ADCs is associated with a column of a plurality of columns, the plurality of ADCs is configured to read charge signals simultaneously from a plurality of pixels arranged on the plurality of lines, the plurality of pixels to be read simultaneously is alternately arranged on a first line of the plurality of lines and a first column of the plurality of columns, a second line shifted upward by one line from the first line and a second column of the plurality of columns, and a third line shifted downward by one line from the first line and a third column of the plurality of columns, and a number of the plurality of ADCs corresponds to a number of the plurality of columns. 2. The image sensor according to claim 1 , wherein an ADC of the plurality of ADCs is associated with the first column of the plurality of columns, the ADC is configured to read a charge signal from a second pixel on a second column of the plurality of columns, and the second column is different from the first column. 3. The image sensor according to claim 2 , wherein the ADC associated with the first column of the plurality of columns is further configured to read the charge signals continuously from the plurality of pixels on the plurality of lines. 4. The image sensor according to claim 1 , wherein an ADC associated with one column of the plurality of columns is configured to read the charge signals continuously from the plurality of pixels arranged on the plurality of lines. 5. The image sensor according to claim 1 , wherein the plurality of pixels are arranged in a saw texture. 6. The image sensor according to claim 1 , further comprising an auxiliary circuit configured to generate a potential to be read by one of the plurality of ADCs, wherein the auxiliary circuit is on an edge area outside an area of the plurality of pixels. 7. The image sensor according to claim 1 , further comprising a plurality of selector switches configured to switch among the plurality of lines, wherein each selector switch of the plurality of selector switches is connected to a respective ADC of the plurality of ADCs. 8. An electronic device, comprising: an image sensor, wherein the image sensor includes: a plurality of lines; and a plurality of analog digital converters (ADCs), wherein each ADC of the plurality of ADCs is associated with a column of a plurality of columns, the plurality of ADCs is configured to read charge signals simultaneously from a plurality of pixels arranged on the plurality of lines, the plurality of pixels to be read simultaneously is alternately arranged on a first line of the plurality of lines and a first column of the plurality of columns, a second line shifted upward by one line from the first line and a second column of the plurality of columns, and a third line shifted downward by one line from the first line and a third column of the plurality of columns, and a number of the plurality of ADCs corresponds to a number of the plurality of columns.

Assignees

Inventors

Classifications

  • H04N25/76Primary

    Addressed sensors, e.g. MOS or CMOS sensors · CPC title

  • H04N25/677Primary

    for reducing the column or line fixed pattern noise · CPC title

  • Electricity · mapped topic

  • H04N5/378Primary

    Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10440304B2 cover?
An image sensor according to a first aspect of the present disclosure includes analog digital converters (ADCs), each of the ADCs being provided for a column, wherein the ADCs associated with the respective columns are configured to read charge signals simultaneously from pixels arranged on lines different from one another of the respectively associated columns, the number of ADCs being a prede…
Who is the assignee on this patent?
Sony Corp, Sony Semiconductor Solutions Corp
What technology area does this patent fall under?
Primary CPC classification H04N25/76. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 08 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).