Semiconductor device, semiconductor system, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-10439389-B2
Application number	US-201715820223-A
Country	US
Kind code	B2
Filing date	Nov 21, 2017
Priority date	Nov 30, 2016
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

An aspect of the disclosure relates to a semiconductor device including a semiconductor element, a connection terminal configured to output a signal based on an output of the semiconductor element, a protection circuit connected to the connection terminal, and a voltage limiting element connected to the connection terminal, wherein the protection circuit is connected to a first power supply line having a first potential and a second power supply line having a second potential lower than the first potential, and wherein a potential supplied to the voltage limiting element is higher than the second potential and lower than the first potential.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor element;
a connection terminal configured to output a signal based on an output of the semiconductor element;
a protection circuit connected to the connection terminal; and
a voltage limiting element connected to the connection terminal,
wherein the protection circuit is connected to a first power supply line having a first potential and a second power supply line having a second potential lower than the first potential,
wherein a potential supplied to the voltage limiting element is higher than the second potential and lower than the first potential,
wherein the semiconductor element includes a first impurity region formed in a semiconductor substrate,
wherein the voltage limiting element includes a second impurity region formed in the semiconductor substrate,
wherein the semiconductor substrate is provided with the protection circuit, and
wherein a PN junction exists between the first impurity region and the second impurity region.

2. The semiconductor device according to claim 1 , wherein the first impurity region of the semiconductor element includes a signal holding unit.

3. The semiconductor device according to claim 1 , wherein the voltage limiting element is configured to limit a potential of the connection terminal by generating a flow of charge between the connection terminal and the second impurity region.

4. The semiconductor device according to claim 1 ,
wherein the voltage limiting element is a metal-oxide-silicon (MOS) transistor, and
wherein the potential supplied to the voltage limiting element is supplied to a gate of the MOS transistor, the second impurity region is a drain of the MOS transistor, and a source of the MOS transistor is connected to the connection terminal.

5. The semiconductor device according to claim 1 ,
wherein the voltage limiting element is a diode,
wherein an anode or a cathode of the diode is connected to the connection terminal, and
wherein the other of the anode and cathode of the diode is the second impurity region, and the potential supplied to the voltage limiting element is supplied to the second impurity region.

6. The semiconductor device according to claim 1 , wherein the semiconductor element includes a photoelectric conversion element.

7. The semiconductor device according to claim 6 , wherein the semiconductor element includes the photoelectric conversion element and a read circuit configured to read a signal from the photoelectric conversion element.

8. The semiconductor device according to claim 1 , wherein the semiconductor element includes a plurality of photoelectric conversion elements arranged in a first direction.

9. The semiconductor device according to claim 1 , wherein the semiconductor element is a memory element.

10. The semiconductor device according to claim 1 , further comprising a switch between the semiconductor element and the voltage limiting element.

11. A semiconductor system comprising:
a plurality of semiconductor devices according to claim 10 ; and
a pad to which outputs from the connection terminals of the plurality of semiconductor devices are input.

12. The semiconductor system according to claim 11 , wherein the switches of the plurality of semiconductor devices turn on at different timing.

13. An electronic apparatus comprising:
a reading unit configured to read a document and generate image data, the reading unit including the semiconductor system according to claim 11 ; and
a processing unit configured to process data based on the image data.

Assignees

• Canon Kk

Inventors

• Ogura Masanori
• Koizumi Toru
• Watanabe Takanori
• Suzuki Takanori
• Iba Jun

Classifications

• H04N1/00888

  Control thereof · CPC title

• H02H9/04 Primary

  responsive to excess voltage (lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T) · CPC title

• H04N2201/04774

  using a reference clock or oscillator (H04N2201/04772 takes precedence) · CPC title

• H04N2201/0081

  Image reader (H04N2201/0091 - H04N2201/0094 take precedence) · CPC title

• H01L27/0255

  Electricity · mapped topic