Method of fabricating light emitting device package

Patent metadata

Field	Value
Publication number	US-10438994-B2
Application number	US-201815992316-A
Country	US
Kind code	B2
Filing date	May 30, 2018
Priority date	Dec 12, 2017
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

A method of fabricating a light emitting device package including forming a cell array that includes semiconductor light-emitters including first and second conductivity-type semiconductor layers and an active layer on a substrate, and a separation region, the cell array having a first surface contacting the substrate; exposing the first surface of the separation region by removing the substrate; forming a seed layer on the first surface in the separation region; forming a photoresist pattern on the light-emitters such that the photoresist pattern exposes the seed layer; forming a partition structure that separates the light-emitters by plating a region exposed by the photoresist pattern; forming light emitting windows of the partition structure by removing the photoresist pattern such that the light-emitters are exposed at lower ends of the light emitting windows; and forming wavelength converters by filling the light emitting windows with a wavelength conversion material.

First claim

What is claimed is:

1. A method of fabricating a light emitting device package, the method comprising:
forming a cell array that includes:
a plurality of semiconductor light-emitters, each of the plurality of semiconductor light-emitters including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer stacked on a substrate for growth, and
a separation region, the cell array having a first surface contacting the substrate for growth, and a second surface opposite to the first surface;

exposing the first surface of the separation region by removing the substrate for growth;
forming a seed layer on the first surface such that the seed layer is in the separation region;
forming a photoresist pattern on the plurality of semiconductor light-emitters such that the photoresist pattern exposes the seed layer;
forming a partition structure that separates the plurality of semiconductor light-emitters by plating a region exposed by the photoresist pattern;
forming a plurality of light emitting windows of the partition structure by removing the photoresist pattern such that the plurality of semiconductor light-emitters are exposed at respective lower ends of the plurality of light emitting windows; and
forming a plurality of wavelength converters by filling the plurality of light emitting windows with a wavelength conversion material.

2. The method as claimed in claim 1 , wherein forming the partition structure includes growing the seed layer.

3. The method as claimed in claim 1 , wherein the seed layer is formed of a material including aluminum (Al), ruthenium (Ru), rhodium (Rh), gold (Au), silver (Ag), platinum (Pt), nickel (Ni), chromium (Cr), or copper (Cu).

4. The method as claimed in claim 1 , wherein the partition structure is disposed on a level that is lower than a level of the photoresist pattern.

5. The method as claimed in claim 1 , wherein a width of the partition structure ranges from 1 μm to 20 μm.

6. The method as claimed in claim 1 , wherein a height of the partition structure is greater than or equal to 10 μm.

7. The method as claimed in claim 1 , wherein forming the cell array further includes forming an insulating layer that covers the plurality of semiconductor light-emitters.

8. The method as claimed in claim 7 , wherein the insulating layer is disposed in the separation region.

9. The method as claimed in claim 1 , further comprising forming an uneven pattern on the exposed first surface of the cell array prior to forming the photoresist pattern.

10. The method as claimed in claim 1 , wherein the separation region exposes the substrate for growth.

11. The method as claimed in claim 1 , wherein the separation region exposes the first conductivity-type semiconductor layer.

12. The method as claimed in claim 11 , further comprising etching and removing a portion of the first conductivity-type semiconductor layer that overlaps the separation region after removing the substrate for growth.

13. The method as claimed in claim 12 , further comprising forming a refractive index matching layer on surfaces of the plurality of semiconductor light-emitters after etching and removing the portion of the first conductivity-type semiconductor layer that overlaps the separation region such that the refractive index matching layer includes a light-transmitting insulating material.

14. The method as claimed in claim 13 , wherein the refractive index matching layer is formed of a material having a refractive index that is lower than a refractive index of the plurality of semiconductor light-emitters and higher than a refractive index of the plurality of wavelength converters.

15. A method of fabricating a light emitting device package, the method comprising:
forming a plurality of semiconductor light-emitters by stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate for growth and by etching a region thereof, the plurality of semiconductor light-emitters having a separation region therebetween exposing the substrate for growth;
exposing the first conductivity-type semiconductor layer of each of the plurality of semiconductor light-emitters by removing the substrate for growth;
forming a seed layer in the separation region;
forming a photoresist pattern on the plurality of semiconductor light-emitters such that the photoresist pattern exposes the seed layer;
forming a partition structure that separates the plurality of semiconductor light-emitters by plating a region exposed by the photoresist pattern;
forming a plurality of light emitting windows of the partition structure by removing the photoresist pattern such that the plurality of semiconductor light-emitters are exposed at respective lower ends of the plurality of light emitting windows; and
forming a plurality of wavelength converters by filling the plurality of light emitting windows with a wavelength conversion material.

16. The method as claimed in claim 15 , further comprising planarizing surfaces of the plurality of wavelength converters after forming the plurality of wavelength converters.

17. The method as claimed in claim 16 , wherein planarizing surfaces of the plurality of wavelength converters includes grinding, polishing, or chemical mechanical polishing.

18. The method as claimed in claim 17 , further comprising:
disposing an optical filter layer on each of the plurality of wavelength converters after forming the plurality of wavelength converters; and
forming an encapsulator on each of the plurality of wavelength converters so as to cover the optical filter layer.

19. A method of fabricating a light emitting device package, the method comprising:
disposing a plurality of semiconductor light-emitters on a substrate for growth such that each of the plurality of semiconductor light-emitters includes a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer, and are separated by a separation region;
exposing the first conductivity-type semiconductor layer by removing the substrate for growth from the plurality of semiconductor light-emitters;
forming a seed layer such that the seed layer is in the separation region;
forming a photoresist pattern on the plurality of semiconductor light-emitters such that the photoresist pattern has a trench and the seed layer is exposed at a bottom of the trench;
forming a partition structure having a plurality of light emitting windows respectively overlying to the plurality of semiconductor light-emitters by plating in the trench;
exposing the plurality of light emitting windows by removing the photoresist pattern; and
forming a plurality of wavelength converters by filling the plurality of light emitting windows with a wavelength conversion material.

20. The method as claimed in claim 19 , wherein forming the partition structure includes growing the seed layer along the trench.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yeon Ji Hye
• Sim Sung Hyun
• Yoo Ha Nul
• Lee Dong Gun

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H01L33/22

  Electricity · mapped topic

• H01L2933/0075

  Electricity · mapped topic

• H01L2933/0058

  Electricity · mapped topic

• H01L33/46

  Electricity · mapped topic