Method of fabricating contact hole

Patent metadata

Field	Value
Publication number	US-10438842-B2
Application number	US-201816003126-A
Country	US
Kind code	B2
Filing date	Jun 8, 2018
Priority date	Dec 29, 2017
Publication date	Oct 8, 2019
Grant date	Oct 8, 2019

Abstract

A method of fabricating a contact hole includes the steps of providing a conductive line, a mask layer covering and contacting the conductive line, a high-k dielectric layer covering and contacting the mask layer, and a first silicon oxide layer covering and contacting the high-k dielectric layer, wherein the high-k dielectric layer includes a first metal oxide layer, a second metal oxide layer and a third metal oxide layer stacked from bottom to top. A dry etching process is performed to etch the first silicon oxide layer, the high-k dielectric layer, and the mask layer to expose the conductive line and form a contact hole. Finally, a wet etching process is performed to etch the first silicon oxide layer, the third metal oxide layer and the second metal oxide layer to widen the contact hole, and the first metal oxide layer remains after the wet etching process.

First claim

What is claimed is:

1. A method of fabricating a contact hole, comprising:
providing a conductive line, a mask layer covering and contacting the conductive line, a high-k dielectric layer covering and contacting the mask layer, and a first silicon oxide layer covering and contacting the high-k dielectric layer, wherein the high-k dielectric layer comprises a first metal oxide layer, a second metal oxide layer and a third metal oxide layer stacked from bottom to top;
performing a dry etching process to etch the first silicon oxide layer, the high-k dielectric layer, and the mask layer to expose the conductive line and form a contact hole; and
performing a wet etching process to etch the first silicon oxide layer, the third metal oxide layer and the second metal oxide layer to widen the contact hole, and the first metal oxide layer remains after the wet etching process.

2. The method of fabricating a contact hole of claim 1 , wherein the first metal oxide layer is zirconium oxide, the second metal oxide layer is aluminum oxide and the third metal oxide layer is zirconium oxide.

3. The method of fabricating a contact hole of claim 1 , further comprising:
forming an etching mask to cover the first silicon oxide layer before the dry etching process;
during the dry etching process, etching the first silicon oxide layer, the high-k dielectric layer and the mask layer by taking the etching mask as a mask; and
removing the etching mask before the wet etching process and after forming the contact hole.

4. The method of fabricating a contact hole of claim 3 , wherein the mask layer is silicon carbonitride, and when removing the etching mask, part of the mask layer is oxidized to become a second silicon oxide layer, and during the wet etching process, the second silicon oxide layer is removed.

5. The method of fabricating a contact hole of claim 4 , wherein the atomic percentage of carbon in the mask layer is between 5 at % and 40 at %.

6. The method of fabricating a contact hole of claim 1 , wherein the mask layer is silicon nitride, and when removing the etching mask, part of the mask layer is oxidized to become a second silicon oxide layer, and during the wet etching process, the second silicon oxide layer is removed.

Assignees

• United Microelectronics Corp
• Fujian Jinhua Integrated Circuit Co Ltd
• Fujian Jinhua Ingtegrated Circuit Co Ltd

Inventors

• Chang Feng-Yi
• Tzou Shih-Fang
• Lee Fu-Che
• Chiang Hsin-Yu
• Chen Yu-Ching

Classifications

• H10P50/283 Primary

  by chemical means · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/069

  by forming self-aligned vias or self-aligned contact plugs · CPC title

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title

• H10W20/075

  of multilayered thin functional dielectric layers · CPC title