Carrier tape, method for manufacturing same, and method for manufacturing RFID tag

US10433470B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10433470-B2
Application numberUS-201715679333-A
CountryUS
Kind codeB2
Filing dateAug 17, 2017
Priority dateNov 7, 2014
Publication dateOct 1, 2019
Grant dateOct 1, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a carrier tape housing a plurality of electronic components with seal materials includes forming housing holes in tape-shaped main body with first and second principal surfaces along a longitudinal direction of the tape-shaped main body, the housing holes penetrating from the first principal surface to the second principal surface, affixing an adhesive layer of a tape-shaped seal material to the second principal surface of the tape-shaped main body to cover the housing holes, forming cuts in the tape-shaped seal material to separate portions defining and functioning as the seal materials including portions at least partially overlapping with the respective housing holes in a planar view from the other portions, and providing chip-shaped electronic component into each of the housing holes of the tape-shaped main body and fixing the electronic component to the adhesive layer of the seal material exposed in each of the housing holes.

First claim

Opening claim text (preview).

What is claimed is: 1. A carrier tape housing a plurality of electronic components with seal materials, the carrier tape comprising: a tape-shaped main body including a first principal surface and a second principal surface and including a plurality of housing holes penetrating from the first principal surface to the second principal surface along a longitudinal direction; a plurality of seal materials each having an adhesive layer on one principle surface and affixed to the second principal surface of the tape-shaped main body such that the adhesive layer is exposed in at least a portion of each of the housing holes; and a plurality of chip-shaped electronic components housed in the respective housing holes and fixed to the adhesive layers of the respective seal materials; wherein the seal materials have rigidity higher than the tape-shaped main body. 2. The carrier tape of claim 1 , wherein the electronic components are components defining RFID tags and each includes an RFIC chip and a substrate with the RFIC chip mounted thereon. 3. The carrier tape of claim 2 , wherein the substrate is a substrate of an RFID tag and includes a power feeding circuit that performs impedance matching between an antenna element and the RFIC chip. 4. The carrier tape of claim 1 , wherein a tape-shaped cover material is affixed to the first principal surface of the tape-shaped main body to cover the plurality of the housing holes housing the electronic components. 5. The carrier tape of claim 1 , wherein the electronic component includes a terminal electrode on a surface on the side opposite to a fixation surface fixed to the adhesive layer of the seal material. 6. A carrier tape housing a plurality of electronic components with seal materials, the carrier tape comprising: a tape-shaped main body including a first principal surface and a second principal surface and including a plurality of housing holes penetrating from the first principal surface to the second principal surface along a longitudinal direction; a plurality of seal materials each having an adhesive layer on one principle surface and affixed to the second principal surface of the tape-shaped main body such that the adhesive layer is exposed in at least a portion of each of the housing holes; and a plurality of chip-shaped electronic components housed in the respective housing holes and fixed to the adhesive layers of the respective seal materials; wherein the electronic components are components defining RFID tags and each includes an RFIC chip and a substrate with the RFIC chip mounted thereon; and the substrate is a substrate of an RFID tag and includes a power feeding circuit that performs impedance matching between an antenna element and the RFIC chip. 7. The carrier tape of claim 6 , wherein the seal materials have rigidity higher than the tape-shaped main body. 8. The carrier tape of claim 6 , wherein a tape-shaped cover material is affixed to the first principal surface of the tape-shaped main body to cover the plurality of the housing holes housing the electronic components. 9. The carrier tape of claim 6 , wherein the electronic component includes a terminal electrode on a surface on the side opposite to a fixation surface fixed to the adhesive layer of the seal material.

Assignees

Inventors

Classifications

  • Labels, tag tickets, or similar identification or indication means (medals or badges A44C3/00; making labels B31D1/02; sheets temporarily attached together B42F; labelling B65C; labels on record carriers G11B23/38, G11B23/40); Seals; Postage or like stamps · CPC title

  • Constructional details, e.g. mounting of circuits in the carrier · CPC title

  • associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title

  • H05K13/003Primary

    Placing of components on belts holding the terminals · CPC title

  • the antenna being on-chip · CPC title

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Frequently asked questions

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What does patent US10433470B2 cover?
A method for manufacturing a carrier tape housing a plurality of electronic components with seal materials includes forming housing holes in tape-shaped main body with first and second principal surfaces along a longitudinal direction of the tape-shaped main body, the housing holes penetrating from the first principal surface to the second principal surface, affixing an adhesive layer of a tape…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H05K13/003. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).