RF amplifier output circuit device with integrated current path, and methods of manufacture thereof

Patent metadata

Field	Value
Publication number	US-10432152-B2
Application number	US-201514919990-A
Country	US
Kind code	B2
Filing date	Oct 22, 2015
Priority date	May 22, 2015
Publication date	Oct 1, 2019
Grant date	Oct 1, 2019

Abstract

A device includes multiple ceramic capacitors and a current path structure. A first ceramic capacitor includes a first ceramic material between first and second electrodes. A second ceramic capacitor includes a second ceramic material between third and fourth electrodes. The second ceramic material has a higher Q than the first ceramic material. The current path structure includes a lateral conductor located between the first and second ceramic materials, and first and second vertical conductors that extend from first and second ends of the lateral conductor to a device surface. The device may be coupled to a substrate of a packaged RF amplifier device, which also includes a transistor. For example, the device may form a portion of an output impedance matching circuit coupled between a current carrying terminal of the transistor and an output lead of the RF amplifier device.

First claim

What is claimed is:

1. A device comprising:
first and second parallel opposed surfaces;
first and second parallel opposed sides extending between the first and second surfaces;
a first ceramic capacitor formed from a first stack that includes a first electrode, a second electrode, and at least one first ceramic layer between the first and second electrodes, wherein the at least one first ceramic layer is formed from a first ceramic material that has a first quality factor, and wherein the first and second electrodes are parallel with the first and second surfaces of the device;
a second ceramic capacitor formed from a second stack that includes a third electrode, a fourth electrode, and at least one second ceramic layer between the third and fourth electrodes, wherein the at least one second ceramic layer is formed from a second ceramic material that has a second quality factor, wherein the second quality factor is higher than the first quality factor, and wherein the third and fourth electrodes are parallel with the first and second surfaces of the device;
a conductive current path structure that includes a lateral conductor, a first vertical conductor proximate to the first side of the device, and a second vertical conductor proximate to the second side of the device, wherein the lateral conductor is parallel with the first and second surfaces of the device, and is located between the first and second ceramic layers, the first vertical conductor extends from a first end of the lateral conductor to the first surface of the device, and the second vertical conductor extends from a second end of the lateral conductor to the first surface of the device; and
one or more additional passive components integrally formed with the device, and electrically connected between the first and third electrodes, wherein the first and second ceramic materials, the first, second, third, and fourth electrodes, the lateral conductor, and the one or more additional passive components are co-fired together to form a monolithic device.

2. The device of claim 1 , further comprising:
a conductive layer over the first surface of the device, wherein the conductive layer forms a portion of a ground node and is configured to be attached to a substrate, wherein the first and second vertical conductors extend across the at least one first ceramic layer from the lateral conductor to the first surface of the device, and wherein the first and second vertical conductors are electrically coupled to the conductive layer.

3. The device of claim 1 , further comprising:
a first contact pad exposed at the first surface of the device and proximate to the first side of the device, wherein the first contact pad is configured to support attachment of a first bondwire to the first contact pad; and
a second contact pad exposed at the first surface of the device and proximate to the second side of the device, wherein the second contact pad is configured to support attachment of a second bondwire to the second contact pad,
wherein the first and second vertical conductors extend across the at least one second ceramic layer from the lateral conductor to the first surface of the device, wherein the first vertical conductor is electrically coupled to the first contact pad, and wherein the second vertical conductor is electrically coupled to the second contact pad.

4. The device of claim 1 , wherein:
the first vertical conductor includes a plurality of first conductive vias proximate to the first side of the device; and
the second vertical conductor includes a plurality of second conductive vias proximate to the second side of the device.

5. The device of claim 1 , wherein:
the first vertical conductor includes conductive material coupled to the first side of the device; and
the second vertical conductor includes conductive material coupled to the second side of the device.

6. The device of claim 1 , wherein the second electrode and the fourth electrode are electrically coupled to a ground node for the device.

7. The device of claim 6 , wherein the first electrode and the third electrode are electrically coupled to a radio frequency (RF) cold point node for the device.

8. The device of claim 7 , wherein the one or more additional passive components comprise:
an inductor coupled in series with the first ceramic capacitor between the RF cold point node and the ground node; and
a resistor coupled in series with the inductor and the first ceramic capacitor between the RF cold point node and the ground node.

9. The device of claim 8 , wherein the resistor is selected from a thick film resistor, a thin film resistor, and a discrete resistor.

10. The device of claim 1 , further comprising:
a third ceramic capacitor, wherein the third ceramic capacitor is formed from a fifth electrode plate, a sixth electrode plate, and a third ceramic layer between the fifth and sixth electrode plates, wherein the third ceramic layer is formed from the second ceramic material.

11. The device of claim 1 , wherein the first ceramic material has a first dielectric constant in a range of 300 to 2000, and the second ceramic material has a second dielectric constant in a range of 10 to 200.

12. A device comprising:
first and second parallel opposed surfaces;
first and second parallel opposed sides extending between the first and second surfaces;
a first ceramic capacitor formed from a first stack that includes a first electrode, a second electrode, and at least one first ceramic layer between the first and second electrodes, wherein the at least one first ceramic layer is formed from a first ceramic material that has a first quality factor, and wherein the first and second electrodes are parallel with the first and second surfaces of the device;
a second ceramic capacitor formed from a second stack that includes a third electrode, a fourth electrode, and at least one second ceramic layer between the third and fourth electrodes, wherein the at least one second ceramic layer is formed from a second ceramic material that has a second quality factor, wherein the second quality factor is higher than the first quality factor, and wherein the third and fourth electrodes are parallel with the first and second surfaces of the device;
a conductive current path structure that includes a lateral conductor, a first vertical conductor proximate to the first side of the device, and a second vertical conductor proximate to the second side of the device, wherein the lateral conductor is parallel with the first and second surfaces of the device, and is located between the first and second ceramic layers, the first vertical conductor extends from a first end of the lateral conductor to the first surface of the device, and the second vertical conductor extends from a second end of the lateral conductor to the first surface of the device;
a first contact pad exposed at the first surface of the device and proximate to the first side of the device, wherein the first contact pad is configured to support attachment of a first bondwire to the first contact pad, wherein the first vertical conductor extends across the at least one first ceramic layer from the lateral conductor to the first surface of the device and the first vertical conductor is electrically coupled to the first contact pad;
a second contact pad exposed at the first surface of the device and proximate to the second side of the device, wherein the second contact pad is configured to support attachment of a second bondwire to the second contact pad, wherein the second vertical conductor extends across the at least one first ceramic layer from the lateral conductor to the first surface of the device, a

Assignees

• Freescale Semiconductor Inc
• Nxp Usa Inc

Inventors

• Watts Michael E
• Jones Jeffrey K
• Zhu Ning
• Volokhine Iouri

Classifications

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W72/07554

  changes in dispositions · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H10W72/932

  Plan-view shape, i.e. in top view · CPC title

• H10W44/241

  for passive devices or passive elements · CPC title