Selectively enable data transfer based on accrued data credits

US10430357B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10430357-B2
Application numberUS-201815899910-A
CountryUS
Kind codeB2
Filing dateFeb 20, 2018
Priority dateSep 18, 2015
Publication dateOct 1, 2019
Grant dateOct 1, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus to arbitrate data transfer between a computing host and a storage device across an interface includes a data transfer limiter configured to track an amount of data credits used by a data transfer across the interface and an amount of accrued data credits available to the interface. The apparatus further includes a data transfer arbiter configured to selectively disable the data transfer across the interface when the amount of data credits used by the data transfer across the interface exceeds a first threshold, and to selectively enable the data transfer across the interface when the amount of data credits used by the data transfer across the interface does not exceed a second threshold. The amount of accrued data credits reduces the amount of data credits used by the data transfer.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus to arbitrate data transfer between a computing host and a storage device across an interface, the apparatus comprising: a read data transfer limiter configured to track an amount of used read data credits comprising read data credits used by a read data transfer across the interface, and track an amount of accrued read data credits available to the interface; a write data transfer limiter configured to track an amount of used write data credits comprising write data credits used by a write data transfer across the interface, and track an amount of accrued write data credits available to the interface; a read data transfer arbiter configured to selectively enable and selectively disable the read data transfer across the interface based on the amount of used read data credits tracked by the read data transfer limiter; and a write data transfer arbiter configured to selectively enable and selectively disable the write data transfer across the interface based on the amount of used write data credits tracked by the write data transfer limiter. 2. The apparatus of claim 1 , further comprising: a time source, wherein the amount of accrued data credits available to the interface increases over time. 3. The apparatus of claim 1 , further comprising: a control line status register (CSR) configured to implement control and status registers utilized by each data transfer arbiter. 4. The apparatus of claim 1 , further comprising: a front end direct memory access engine configured to manage data relating to at least one of the read data transfer and the write data transfer. 5. The apparatus of claim 1 , further comprising: a front end processing unit configured to process a command relating to at least one of the read data transfer and the write data transfer. 6. The apparatus of claim 1 , wherein the interface supports one of a peripheral component interconnect express (PCIe) interface, a serial ATA interface, a small computer system interface (SCSI), and a serial attached SCSI (SAS) interface. 7. A system to arbitrate data transfer between a computing host and a storage device across an interface, the system comprising: a memory to store data accessed by the computing host; and a storage controller comprising a read data transfer limiter configured to track an amount of used read data credits comprising read data credits used by a read data transfer across the interface, and track an amount of accrued read data credits available to the interface, a write data transfer limiter configured to track an amount of used write data credits comprising write data credits used by a write data transfer across the interface, and track an amount of accrued write data credits available to the interface, a read data transfer arbiter configured to selectively enable and selectively disable the read data transfer across the interface based on the amount of used read data credits tracked by the read data transfer limiter, and a write data transfer arbiter configured to selectively enable and selectively disable the write data transfer across the interface based on the amount of used write data credits tracked by the write data transfer limiter. 8. The system of claim 7 , wherein the read data transfer arbiter selectively enables the read data transfer across the interface when the amount of used read data credits does not exceed the amount of accrued read data credits. 9. The system of claim 7 , wherein the read data transfer arbiter selectively disables the read data transfer until the amount of accrued read data credits reaches an accrued read data credit threshold. 10. The system of claim 7 , wherein the write data transfer arbiter selectively enables the write data transfer across the interface when the amount of used write data credits does not exceed the amount of accrued write data credits. 11. The system of claim 7 , wherein the write data transfer arbiter selectively disables the write data transfer until the amount of accrued write data credits reaches an accrued write data credit threshold. 12. A method to arbitrate data transfer between a computing host and a storage device across an interface, the method comprising the steps of: tracking an amount of used read data credits comprising read data credits used by a read data transfer across the interface; tracking an amount of accrued read data credits available to the interface; tracking an amount of used write data credits comprising write data credits used by a write data transfer across the interface; tracking an amount of accrued write data credits available to the interface; selectively enabling and selectively disabling, by a read data transfer arbiter, the read data transfer across the interface based on the amount of used read data credits that have been tracked; and selectively enabling and selectively disabling, by a write data transfer arbiter, the write data transfer across the interface based on the amount of used write data credits that have been tracked. 13. The method of claim 12 , wherein the step of selectively enabling and selectively disabling, by a read data transfer arbiter, the read data transfer across the interface comprises the steps of: storing a first read threshold, the first read threshold defined by a maximum amount of read data credits, expressed in units of bytes, that the interface can support; storing a second read threshold, the second read threshold defined by a predetermined maximum amount of read data credits, expressed in units of bytes totaling less than the first read threshold, beyond which resumption of read data transfer across the interface is not permitted following a disabling of the read data transfer across the interface; disabling the read data transfer across the interface when the amount of used read data credits exceeds the first read threshold; and enabling resumption of read data transfer across the interface, following a disabling of the read data transfer across the interface, when the amount of used read data credits does not exceed the second read threshold, wherein the amount of accrued read data credits reduces an amount of read data credits used by the read data transfer. 14. The method of claim 12 , wherein the step of selectively enabling and selectively disabling, by a write data transfer arbiter, the write data transfer across the interface comprises the steps of: storing a first write threshold, the first write threshold defined by a maximum amount of write data credits, expressed in units of bytes, that the interface can support; storing a second write threshold, the second write threshold defined by a predetermined maximum amount of write data credits, expressed in units of bytes totaling less than the first write threshold, beyond which resumption of write data transfer across the interface is not permitted following a disabling of the write data transfer across the interface; disabling the write data transfer across the interface when the amount of used write data credits exceeds the first write threshold; and enabling resumption of write data transfer across the interface, following a disabling of the write data transfer across the interface, when the amount of used write data credits does not exceed the second write threshold, wherein the amount of accrued write data credits reduces an amount of write data credits used by the write data transfer.

Assignees

Inventors

Classifications

  • G06F13/28Primary

    using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • based on arbitration (arbitration in handling access to a common bus or bus system G06F13/36) · CPC title

  • using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

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Frequently asked questions

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What does patent US10430357B2 cover?
An apparatus to arbitrate data transfer between a computing host and a storage device across an interface includes a data transfer limiter configured to track an amount of data credits used by a data transfer across the interface and an amount of accrued data credits available to the interface. The apparatus further includes a data transfer arbiter configured to selectively disable the data tra…
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G06F13/28. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).