Apparatus and method for pile-up correction in photon-counting detector
US-2017086761-A1 · Mar 30, 2017 · US
US10422887B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10422887-B2 |
| Application number | US-201715481045-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 6, 2017 |
| Priority date | Apr 6, 2017 |
| Publication date | Sep 24, 2019 |
| Grant date | Sep 24, 2019 |
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Disclosed is a photon-counting x-ray detector system having a plurality of photon-counting channels, and at least one anti-coincidence circuit, each of which is connected to least two of the channels and configured to detect coincident events in the connected channels. The x-ray detector system further includes an anti-coincidence controller configured to control the operation of the at least one anti-coincidence circuit based on photon count information by gradually adapting the operation of the at least one anti-coincidence circuit with increasing count rates, starting from a threshold count rate.
Opening claim text (preview).
The invention claimed is: 1. A photon-counting x-ray detector system comprising: a plurality of photon-counting channels, and at least one anti-coincidence circuit, each of which is connected to least two of the channels and configured to detect coincident events in the connected channels, wherein the x-ray detector system further comprises an anti-coincidence controller configured to control the operation of said at least one anti-coincidence circuit based on photon count information by gradually adapting the operation of said at least one anti-coincidence circuit with increasing count rates, starting from a threshold count rate, wherein the anti-coincidence controller is configured to control when the at least one anti-coincidence circuit is enabled and when the at least one anti-coincidence circuit is disabled, and to gradually increase the time during which the at least one anti-coincidence circuit is disabled with increasing count rates. 2. The photon-counting x-ray detector system of claim 1 , wherein the anti-coincidence controller is configured to control the operation of said at least one anti-coincidence circuit by gradually limiting the influence of the at least one anti-coincidence circuit with increasing count rates, starting from a threshold count rate. 3. The photon-counting x-ray detector system of claim 1 , wherein the anti-coincidence controller is configured to gradually increase the time during which the at least one anti-coincidence circuit is disabled per frame or per set of frames. 4. The photon-counting x-ray detector system of claim 1 , wherein said at least one anti-coincidence circuit is enabled in at least one channel during at least part of at least one frame and/or said at least one anti-coincidence circuit is disabled in at least one channel in at least one frame.
Circuit arrangements not adapted to a particular type of detector {(pulse-selection circuits H03K, G01R)} · CPC title
with coincidence circuit arrangements (G01T1/178 takes precedence {; combination of detectors, see G01T1/1603, G01T1/30}) · CPC title
Detector read-out circuitry (for processing gain or off-set correction H04N) · CPC title
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