Adjustment of qubit frequency through annealing

US10418540B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10418540-B2
Application numberUS-201715824438-A
CountryUS
Kind codeB2
Filing dateNov 28, 2017
Priority dateNov 28, 2017
Publication dateSep 17, 2019
Grant dateSep 17, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An embodiment includes a method and device for forming a multi-qubit chip. The method includes forming a plurality of qubits on a chip, where each qubit comprises a Josephson junction. The method includes annealing one or more Josephson junctions. Annealing is performed by one or more of a plurality of laser emission sources on a planar lightwave circuit. Each of the laser emission sources is located above each qubit.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a multi-qubit chip, the method comprising: forming a plurality of qubits on a chip, wherein each qubit comprises a Josephson junction; annealing one or more Josephson junctions, wherein annealing is performed by one or more of a plurality of laser discharge structures sources on a planar lightwave circuit, and wherein each of the laser discharge structures is located above each qubit. 2. The method of claim 1 , wherein a laser discharge structure of the plurality of laser discharge structures provides a laser emission wavelength of about 532 nm. 3. The method of claim 1 , wherein a laser discharge structure of the plurality of laser discharge structures provides a laser intensity of about 0.2 W to about 2 W. 4. The method of claim 1 , wherein the qubit further comprises capacitive plates located on each side of the Josephson junction, and wherein each laser discharge structure focuses a laser emission toward the Josephson junction, and wherein the laser emission avoids the capacitive plates. 5. The method of claim 1 , further comprising performing annealing through an intermediate chip. 6. The method of claim 1 , wherein a laser discharge structure of the plurality of laser discharge structures is a vertical grating coupler. 7. The method of claim 1 , wherein a laser power source is connected to a laser emission source by a mode converter and a laser path. 8. The method of claim 7 , wherein a single mode converter is attached, via a single laser path, to a single laser emission source. 9. The method of claim 7 , wherein the mode converter provides power to a plurality of laser emission sources. 10. The method of claim 9 , wherein the laser path is split into a first laser path for a first laser discharge structure and a second laser path for a second discharge structure source using a Mach Zehnder switch. 11. The method of claim 7 , wherein the laser path is an optical fiber. 12. The method of claim 7 , wherein performing annealing causes the resistance of a Josephson junction to increase, wherein the Josephson junction comprises an Al/AlO x /Al structure. 13. The method of claim 7 , wherein performing annealing causes the resistance of an aluminum/aluminum oxide/aluminum Josephson junction to decrease.

Assignees

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Classifications

  • utilising prism or grating {(G02B6/293 takes precedence)} · CPC title

  • Switching arrangements, i.e. number of input/output ports and interconnection types · CPC title

  • Electricity · mapped topic

  • H01L39/249Primary

    Electricity · mapped topic

  • Treatment of superconductor layers by irradiation, e.g. ion-beam, electron-beam, laser beam or X-rays · CPC title

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What does patent US10418540B2 cover?
An embodiment includes a method and device for forming a multi-qubit chip. The method includes forming a plurality of qubits on a chip, where each qubit comprises a Josephson junction. The method includes annealing one or more Josephson junctions. Annealing is performed by one or more of a plurality of laser emission sources on a planar lightwave circuit. Each of the laser emission sources is l…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L39/249. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 17 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).