Electronic assembly with a direct bonded copper substrate

Patent metadata

Field	Value
Publication number	US-10418307-B2
Application number	US-201715852616-A
Country	US
Kind code	B2
Filing date	Dec 22, 2017
Priority date	Dec 22, 2017
Publication date	Sep 17, 2019
Grant date	Sep 17, 2019

Abstract

A metallic island is disposed between a first metallic bus and a second metallic bus. The first metallic strip is isolated from the metallic island by a first dielectric barrier. At least a parallel portion of the first metallic strip is generally parallel to the first metallic bus, the second metallic strip isolated from the second metallic bus by a second dielectric barrier. Each first semiconductor terminals that are coupled to the first metallic bus and to the metallic island. Each second semiconductor has terminals coupled to the metallic island and to the second metallic bus.

First claim

The following is claimed:

1. An electronic assembly comprising:
a direct copper bonded dielectric substrate comprising a dielectric layer;
a first metallic bus overlying the dielectric layer, the first metallic bus having a bus width;
a second metallic bus overlying the dielectric layer and generally parallel to the first metallic bus, where the first metallic bus and the second metallic bus are associated with direct current terminals;
a metallic island between the first metallic bus and the second metallic bus;
a first metallic strip having a strip width that is less than the bus width, the first metallic strip isolated from the metallic island by a first dielectric barrier;
a second metallic strip having the strip width that is less than the bus width, the second metallic strip isolated from the second metallic bus by a second dielectric barrier;
a set of one or more first semiconductors, each first semiconductor having at least one primary terminal and a secondary terminal, the at least one primary terminal coupled to the first metallic bus and the secondary terminal coupled to the metallic island; and
a set of one or more second semiconductors, each second semiconductor having at least one primary terminal and a secondary terminal, the at least one primary terminal coupled to the metallic island and the secondary terminal coupled to the second metallic bus.

2. The electronic assembly according to claim 1 wherein the first metallic bus, the second metallic bus, and the first metallic island are composed of copper or copper alloy directly bonded to the dielectric layer via a base layer.

3. The electronic assembly according to claim 1 wherein the first metallic bus, the second metallic bus, the first metallic strip, and the second metallic strip are composed of copper or a copper alloy.

4. The electronic assembly according to claim 1 wherein each one of the first semiconductors further comprises a tertiary terminal coupled to the first metallic strip; wherein each one of the second semiconductors further comprises another tertiary terminal coupled to the second metallic strip.

5. The electronic assembly according to claim 4 wherein the tertiary terminals comprises wire bonds directly bonded to corresponding first metallic strip and the second metallic strip.

6. The electronic assembly according to claim 4 wherein the at least one primary terminal comprises a parallel set of multiple wire bonds to support greater current-handling capacity.

7. The electronic assembly according to claim 1 wherein the secondary terminal of the first semiconductor comprises a conductive pad on a lower surface of the first semiconductor, where the secondary terminal of the second semiconductor comprises a conductive pad on a lower surface of the second semiconductor.

8. The electronic assembly according to claim 1 wherein the primary terminal and the secondary terminal comprise switched terminals of each one of the first semiconductors and wherein the tertiary terminal comprises a control terminal of each of the first semiconductors.

9. The electronic assembly according to claim 1 wherein the primary terminal and the secondary terminal comprise switched terminals of each one of the second semiconductors and wherein the tertiary terminal comprises a control terminal of each of second first semiconductors.

10. The electronic assembly according to claim 1 wherein a parallel portion of the first metallic strip is generally parallel to the first metallic bus, and where first metallic strip has perpendicular portion that substantially perpendicular to the parallel portion.

11. The electronic assembly according to claim 1 wherein the first metallic bus and the second metallic bus are associated with the direct current terminals with corresponding bores.

12. The electronic assembly according to claim 1 wherein each one of first metallic bus, the second metallic bus, the first metallic strip and the second metallic strip has a connector tab extending normal to or substantially perpendicular to a corresponding one of first metallic bus, the second metallic bus, the first metallic strip and the second metallic strip.

13. The electronic assembly according claim 12 wherein the connector tab terminates in a substantially oval portion with a corresponding oval opening.

14. The electronic assembly according to claim 1 further comprising:
a current shunt resistor mounted on the dielectric substrate and spaced apart from the first semiconductors and the second semiconductors.

15. The electronic assembly according to claim 14 wherein the current shunt resistor further comprises:
a first annular member overlying the metallic island or a conductive pad on the dielectric layer, the first annular member composed of an electrically conductive material, the first annular member having a base portion, an intermediate portion above the base portion, and an outer portion above the intermediate neck portion; and
a second annular member coaxially engaging the intermediate neck portion of the first annular member, the second annular member composed of a dielectric material, wherein terminals of the current shunt resistor are electrically and mechanically connected the base portion and the outer portion.

16. The electronic assembly according to claim 15 further comprising:
a temperature sensor embedded in the second annular member.

17. The electronic assembly according to claim 16 further comprising:
a plurality of terminals of the temperature sensor and the terminals of the current shunt resistor connected to pads via wire bonds.

18. The electronic assembly according to claim 15 further comprising:
a current measurement circuit coupled to the terminals of the current shunt resistor to measure a voltage drop across the current shunt resistor that is proportional to a current flowing in the current shunt resistor.

19. An electronic assembly comprising:
a direct copper bonded dielectric substrate comprising a dielectric layer;
a first metallic bus overlying the dielectric layer, the first metallic bus having a bus width;
a second metallic bus overlying the dielectric layer and generally parallel to the first metallic bus, where the first metallic bus and the second metallic bus are associated with direct current terminals;
a metallic island between the first metallic bus and the second metallic bus, the metallic island comprising an output terminal pad;
a first metallic strip having a strip width that is less than the bus width, the first metallic strip isolated from the metallic island by a first dielectric barrier;
a second metallic strip having the strip width that is less than the bus width, the second metallic strip isolated from the second metallic bus by a second dielectric barrier;
a set of one or more first semiconductors, each first semiconductor having at least one primary terminal and a secondary terminal, the at least one primary terminal coupled to the first metallic bus and the secondary terminal coupled to the metallic island;
a set of one or more second semiconductors, each second semiconductor having at least one primary terminal and a secondary terminal, the at least one primary terminal coupled to the metallic island and the secondary terminal coupled to the second metallic bus; and
a current shunt resistor overlies a portion of the metallic island or the output terminal pad associated with an output signal of the electronic assembly, the current shunt resistor having a central bore and providing an output terminal for the output si

Assignees

• Deere & Co

Inventors

• Schmit Christopher J
• Wainwright Richard E

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title