Conjugated polymer composition for solar cell and flexible electronics applications
US-9035016-B2 · May 19, 2015 · US
US10418237B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10418237-B2 |
| Application number | US-201715820803-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 22, 2017 |
| Priority date | Nov 23, 2016 |
| Publication date | Sep 17, 2019 |
| Grant date | Sep 17, 2019 |
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A nanoelectronics structure is disclosed which includes a substrate layer which has least a first surface and also has a thickness of less than 100 nm. The nanoelectronics structure also includes a dielectric layer, which is deposited on the first surface of the substrate layer and has a thickness of less than 100 nm. This dielectric layer is made up of at least 90 mole percent amorphous boron nitride. Also disclosed is a method for forming a dielectric layer on a substrate using pulsed laser deposition.
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What is claimed is: 1. A nanoelectronics structure comprising: a substrate layer having at least a first surface and having a thickness of less than 100 nm; and a dielectric layer deposited on the first surface of the substrate layer and having a thickness of less than 100 nm, wherein the dielectric layer comprises at least 90 mole percent amorphous boron nitride and exhibits a bandgap from about 4.0 eV to about 5.0 eV. 2. The nanoelectronics structure of claim 1 , wherein the dielectric layer comprises at least 95 mole percent amorphous boron nitride. 3. The nanoelectronics structure of claim 1 , wherein the substrate layer has a thickness of less than 20 nm. 4. The nanoelectronics structure of claim 1 , wherein the substrate layer comprises a material selected from the group consisting of silicon substrates, silicon oxide substrates, single-crystalline substrates, poly-crystalline substrates, polymer substrates, metal substrates, and two dimensional substrates. 5. The nanoelectronics structure of claim 1 , wherein the substrate layer comprises a material selected from the group consisting of tungsten, copper, silicon dioxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), molybdenum disulfide (MoS 2 ), graphene, polyethylene terephthalate (PET), and polydimethylsiloxane (PDMS). 6. The nanoelectronics structure of claim 1 , wherein the dielectric layer has a thickness of less than 20 nm. 7. The nanoelectronics structure of claim 1 , wherein the dielectric layer has a thickness of less than 10 nm. 8. The nanoelectronics structure of claim 1 , wherein the dielectric layer exhibits a dielectric constant from about 5.2 to about 6.6. 9. The nanoelectronics structure of claim 1 , wherein the dielectric layer exhibits a bandgap from about 4.3 eV to about 4.7 eV. 10. A nanoelectronics structure comprising: a substrate layer having at least a first surface and having a thickness of less than 20 nm; and a dielectric layer deposited on the first surface of the substrate layer and having a thickness of less than 20 nm, wherein the substrate layer comprises a two-dimensional substrate material selected from the group consisting of molybdenum disulfide (MoS 2 ) and graphene, and wherein the dielectric layer comprises at least 90 mole percent amorphous boron nitride.
using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition · CPC title
Organic materials, e.g. photoresists · CPC title
the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title
comprising flexible or deformable elements · CPC title
Manufacturing processes for forming specific nanostructures not provided for in groups B82B3/0014 - B82B3/0033 · CPC title
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