Identification bit memory cells in data storage chip

Patent metadata

Field	Value
Publication number	US-10412235-B2
Application number	US-201114343396-A
Country	US
Kind code	B2
Filing date	Sep 30, 2011
Priority date	Sep 30, 2011
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

In an embodiment, an authentication system includes a supply device having a data storage chip with identification (ID) bit memory cells. The ID bit memory cells comprising a measured cell, pointer cells to store address information that points to the measured cell, and analog cells that store factory-measured analog information about the measured cell.

First claim

What is claimed is:

1. An authentication system having an electrically-measurable analog electrical characteristic, comprising:
a supply device having a one-time programmable data storage chip with identification (ID) bit memory cells programmed to identify the supply device, the ID bit memory cells comprising:
a measured cell located at a predetermined position within the data storage chip and having an analog electrical characteristic factory-measured during fabrication of the data storage chip by applying a current to the measured cell,
pointer cells factory-programmed during fabrication of the data storage chip to store predetermined address information that points to the measured cell within the data storage chip,
a reference cell located at a predetermined position within the data storage chip and having a reference value; and
analog cells factory-programmed during fabrication of the data storage chip to store factory-measured analog information about the measured cell, wherein the factory-measured analog information comprises a ratio of the factory-measured analog electrical characteristic of the measured cell and the reference value.

2. An authentication system as in claim 1 , further comprising:
a base unit to receive the supply device;
a controller integrated into the base unit; and
an authentication algorithm executable on the controller to locate the measured cell using the address information, measure the measured cell for field-measured analog information, compare the factory-measured analog information and the field-measured analog information, and authenticate the supply device if the factory-measured and field-measured analog information match.

3. An authentication system as in claim 2 , further comprising a measurement circuit to measure analog electrical characteristic of the measured cell.

4. An authentication system as in claim 3 , wherein the electrical characteristic is selected from the group consisting of a voltage, an impedance, a resistance, a capacitance, an inductance, a mathematical combination of any of such electrical characteristics, and a ratio of any of such electrical characteristics.

5. An authentication system as in claim 3 , wherein
the authentication algorithm is to determine the field-measured analog information from a ratio of a field-measured value of the electrical characteristic of the measured cell and a field-measured reference value.

6. An authentication system as in claim 2 , wherein the base unit comprises a printing system and the supply device comprises an inkjet cartridge.

7. An authentication system as in claim 2 , wherein the authentication algorithm is to supply current from a current supply to the measured cell to measure the measured cell for the field-measured analog information.

8. An authentication system as in claim 2 , wherein the authentication algorithm is to:
measure the reference cell to acquire a field-measured reference value; and
determine a ratio of the field-measured analog electrical characteristic and the field measured reference value.

9. An authentication system as in claim 1 , wherein the ID bit memory cells are selected from the group consisting of MROM cells, PROM cells, and fuses.

10. An authentication system as in claim 1 , wherein an address location of the measured cell within the ID bit memory cells differs among data storage chips.

11. An authentication system as in claim 1 , wherein an address location of the pointer cells within the ID bit memory cells differs among data storage chips.

12. An authentication system as in claim 1 , wherein the analog cells store information for multiple factory-measured analog electrical characteristics of the measured cell.

13. An ink cartridge having an electrically-measurable analog electrical characteristic, comprising:
a one-time programmable data storage chip having identification (ID) bit memory cells programmed to identify the ink cartridge, the chip including:
a measured cell located at a predetermined position within the data storage chip and having an analog electrical characteristic factory-measured during fabrication of the data storage chip by applying a current to the measured cell,
pointer cells factory-programmed during fabrication of the data storage chip to store predetermined address information that points to the measured cell within the data storage chip,
a reference cell located at a predetermined position within the data storage chip and having a reference value; and
analog cells factory-programmed during fabrication of the data storage chip to store factory-measured analog information about the measured cell, wherein the factory-measured analog information comprises a ratio of the factory-measured analog electrical characteristic of the measured cell and the reference value.

14. An ink cartridge as in claim 13 , wherein the
reference cell is measurable in the field by a measurement circuit applying a current to the measured cell to provide an analog reference value of the electrical characteristic value.

15. An ink cartridge as in claim 14 , wherein the electrical characteristic is selected from the group consisting of a voltage, an impedance, a resistance, a capacitance, an inductance, a mathematical combination of any of such electrical characteristics, and a ratio of any of such electrical characteristics.

16. An ink cartridge as in claim 13 , wherein the reference cell is programmed to a known logic value.

17. An ink cartridge as in claim 13 , wherein the ID bit memory cells are selected from the group consisting of MROM cells, PROM cells, and fuses.

18. An ink cartridge as in claim 13 , wherein an address location of the measured cell within the ID bit memory cells differs among data storage chips.

19. An ink cartridge as in claim 13 , wherein an address location of the pointer cells within the ID bit memory cells differs among data storage chips.

20. An ink cartridge as in claim 13 , wherein the measured cell is measurable upon field-installation of the ink cartridge in a printer to yield field-measured analog information for comparison to the stored factory-measured analog information so as to authenticate the ink cartridge.

21. An ink cartridge as in claim 13 , wherein at least one of the analog cells is not at an adjacent address in the data storage chip to any other of the analog cells.

22. An ink cartridge as in claim 13 , wherein the reference cell is measurable upon field-installation of the ink cartridge in a printer to yield field-measured reference value for comparison to the stored factory-measured analog information so as to authenticate the ink cartridge.

23. An ink cartridge having an electrically-measurable analog electrical characteristic, comprising:
a one-time programmable data storage chip having identification (ID) bit memory cells programmed to identify the ink cartridge, the chip including:
a measured cell located at a predetermined position within the data storage chip and having an analog electrical characteristic factory-measured during fabrication of the data storage chip by a measurement circuit external to the ink cartridge that applies a current to the measured cell,
pointer cells factory-programmed during fabrication of the data storage chip to store predetermined address information that points to the measured cell within the data storage chip,
a reference cell located at a predetermined position within the data storage chip and having a reference value, and

Assignees

• Rice Huston W
• Novak David B
• Ness Erik D
• Hall Brendan
• Hewlett Packard Development Co

Inventors

• Rice Huston W
• Novak David B
• Ness Erik D
• Hall Brendan

Classifications

• H01M10/4257

  Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries · CPC title

• H01M6/5066

  Type recognition · CPC title

• G01R31/382

  Arrangements for monitoring battery or accumulator variables, e.g. SoC · CPC title

• H04L9/3278

  using physically unclonable functions [PUF] · CPC title

• B41J29/393

  Devices for controlling or analysing the entire machine {; Controlling or analysing mechanical parameters involving printing of test patterns} · CPC title