Method and apparatus for controlling a multichannel TDM device

US10411822B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10411822-B2
Application numberUS-201715823547-A
CountryUS
Kind codeB2
Filing dateNov 27, 2017
Priority dateMay 20, 2013
Publication dateSep 10, 2019
Grant dateSep 10, 2019

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  1. Title

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  5. First independent claim

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Abstract

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A method for developing TDM data with embedded control data includes obtaining signal data and control data, formatting the signal data and the control data into a plurality of channels of a DIN signal, and transmitting the DIN signal on one line of a 3-bit TDM bus. A multichannel input device includes a control extractor receptive to the three-bit TDM bus and operative to extract CNTL data from the DIN data, a DAI receptive to the 3-bit TDM bus and the channel select input and operative to develop a SIGNAL data output, and a DAC block including a DAC, the DAC block being receptive to the SIGNAL data and the CNTL data.

First claim

Opening claim text (preview).

What is claimed is: 1. A multichannel input device system with TDM bus comprising: a three-bit TDM bus providing TDM channel embedded control data, wherein the three-bit TDM bus includes SYNC, CLK and DIN lines, where the DIN line carries DIN data including SIGNAL data and CNTL data; and a plurality of multichannel input devices each coupled to, and deriving their control data from, the three-bit TDM bus; wherein each of the plurality of multichannel input devices is formed on an integrated circuit (IC) chip that is disposed in an IC package having no more than nine contacts. 2. A multichannel input device system with TDM bus comprising: a three-bit TDM bus providing TDM channel embedded control data, wherein the three-bit TDM bus includes SYNC, CLK and DIN lines, where the DIN line carries DIN data including SIGNAL data and CNTL data; and a plurality of multichannel input devices each coupled to, and deriving their control data from, the three-bit TDM bus; wherein each of the plurality of multichannel input devices is formed on an integrated circuit (IC) chip that is disposed in an IC package having no more than nine contacts; and wherein each of the plurality of multichannel input devices includes: a detector receptive to a BCLK signal and a LRCLK signal and operative to develop a number of channels (NCHAN) signal and a bit depth (B) signal; a digital audio interface (DAI) receptive to a DIN signal, the BCLK signal, the LRCLK signal, the NCHAN signal and the B signal and operative to output a channel digital data signal; a digital-to-analog converter (DAC) receptive to the channel digital data signal and operative to develop an analog signal; and an analog device receptive to the analog signal. 3. A multichannel input device system with TDM bus a three-bit TDM bus providing TDM channel embedded control data, wherein the three-bit TDM bus includes SYNC, CLK and DIN lines, where the DIN line carries DIN data including SIGNAL data and CNTL data; and a plurality of multichannel input devices each coupled to, and deriving their control data from, the three-bit TDM bus; wherein each of the plurality of multichannel input devices is formed on an integrated circuit (IC) chip that is disposed in an IC package having no more than nine contacts; and wherein each of the plurality of multichannel input devices includes: a control extractor receptive to the three-bit TDM bus and operative to extract CNTL data from the DIN data; a DAI receptive to the 3-bit TDM bus and to a channel select (CS) input and operative to develop a SIGNAL data output; and a DAC block including a DAC, the DAC block being receptive to the SIGNAL data and the CNTL data. 4. A multichannel input device system with TDM bus as recited in claim 3 wherein the DAC block includes an analog device coupled to an output of the DAC. 5. A multichannel input device comprising: a detector receptive to a BCLK signal and a LRCLK signal and operative to develop a number of channels (NCHAN) signal and a bit depth (B) signal; a digital audio interface (DAI) receptive to a DIN signal, the BCLK signal, the LRCLK signal, the NCHAN signal and the B signal and operative to output a channel digital data signal; a digital-to-analog converter (DAC) receptive to the channel digital data signal and operative to develop an analog signal; and an analog device receptive to the analog signal; wherein the detector, the DAI, the DAC and the analog device are formed on an integrated circuit (IC) chip that is disposed in an IC package having no more than nine contacts. 6. A multichannel input device as recited in claim 5 wherein the detector comprises: a first counter clocked by the BCLK signal and reset by the LRCLK signal; a first latch register clocked by the LRCLK signal and having an input coupled to an output of the first counter; a second counter clocked by the BCLK signal and reset by the LRCLK signal; a second latch register clocked by the LRCLK signal and having an input coupled to an output of the second counter; and logic having a first input coupled to an output of the first latch register and a second input coupled to an output of the second latch register; whereby the logic outputs the NCHAN signal and the B signal. 7. A method for developing TDM data with embedded control data comprising: forming circuitry on an integrated circuit (IC) chip that is disposed in an IC package having no more than nine contacts for: obtaining signal data and control data; formatting the signal data and the control data into a plurality of channels of a DIN signal; and serially transmitting the DIN signal on one line of a 3-bit TDM bus. 8. A method for developing TDM data with embedded control data as recited in claim 7 wherein formatting includes: designating one channel of the DIN signal to be used as a designated control channel; and using the designated control channel for a plurality of output channels having a corresponding plurality of signal data channels. 9. A method for developing TDM data with embedded control data as recited in claim 8 wherein there are at least three signal data channels associated with at least three output channels. 10. A method for developing TDM data with embedded control data as recited in claim 9 wherein each signal data channel is as wide as an LRCLK pulse. 11. A method for developing TDM data with embedded control data as recited in claim 10 wherein the control channel includes at least one of a VALID DATA, GAIN, SAMPLE RATE and MUTE command. 12. A method for controlling a multiple data channel TDM device comprising: obtaining signal data and control data; formatting the signal data and the control data into a plurality of channels of a DIN signal; and serially transmitting the DIN signal on one line of a 3-bit TDM bus; wherein formatting includes, identifying unused least significant bits (LSBs) of the TDM data; and embedding one or more control signals in the LSBs. 13. A method for controlling a multiple data channel TDM device as recited in claim 12 wherein the control signals include at least one of a VALID DATA, GAIN, SAMPLE RATE and MUTE command. 14. A method for controlling a multiple data channel TDM device as recited in claim 12 wherein different sample rate data can be sent over the same TDM interface by stuffing lower sample rate channels with ignored samples.

Assignees

Inventors

Classifications

  • H03F3/217Primary

    Class D power amplifiers; Switching amplifiers · CPC title

  • Power amplifiers, e.g. Class B amplifiers, Class C amplifiers (H03F3/26 - H03F3/30 take precedence) · CPC title

  • H04J3/1694Primary

    Allocation of channels in TDM/TDMA networks, e.g. distributed multiplexers (Passive Optical Networks H04Q11/0062) · CPC title

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What does patent US10411822B2 cover?
A method for developing TDM data with embedded control data includes obtaining signal data and control data, formatting the signal data and the control data into a plurality of channels of a DIN signal, and transmitting the DIN signal on one line of a 3-bit TDM bus. A multichannel input device includes a control extractor receptive to the three-bit TDM bus and operative to extract CNTL data fro…
Who is the assignee on this patent?
Maxim Integrated Products, Maxim Integrated Product Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/217. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 10 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).