Solid state switch system

Patent metadata

Field	Value
Publication number	US-10411694-B2
Application number	US-201615217571-A
Country	US
Kind code	B2
Filing date	Jul 22, 2016
Priority date	Jul 22, 2016
Publication date	Sep 10, 2019
Grant date	Sep 10, 2019

Abstract

A solid state switch has at least one FET-type device and at least one thyristor-type device coupled in parallel to the at least one FET-type device. The at least one FET-type device is constructed with a first power loss profile based on a rated current of an electrical device; and the at least one thyristor-type device is constructed with a second power loss profile based on a surge current associated with the electrical device.

First claim

What is claimed is:

1. A solid state contactor system for connecting and disconnecting an electrical machine to/from a power source, the electrical machine having a rated current, comprising:
a first terminal constructed for coupling to and receiving power from a power source;
a second terminal constructed for providing power from the power source to the electrical machine;
at least one FET-type device coupled to the first terminal and the second terminal; and
at least one thyristor-type device coupled to the first terminal and the second terminal in parallel to the at least one FET-type device,
wherein the at least one FET-type device is constructed with a first power loss profile based on the rated current;
wherein the at least one thyristor-type device is constructed with a second power loss profile based on an inrush current and a start current associated with the electrical machine;
wherein the at least one FET-type device is selected and constructed to have a lower power loss than the at least one thyristor-type device at and below the rated current; and
wherein the at least one thyristor-type device is selected and constructed to have a lower power loss than the at least one FET-type device at the inrush current and start current associated with the electrical machine.

2. The solid state contactor system of claim 1 , wherein current flow is shared between the at least one FET-type device and the at least one thyristor-type device.

3. The solid state contactor system of claim 1 , wherein the at least one thyristor-type device includes:
a first thyristor-type device coupled directly to the first terminal and the second terminal in parallel with the at least one FET-type device; and
a second thyristor-type device coupled directly to the first terminal and the second terminal in anti parallel with the first thyristor-type device.

4. The solid state contactor system of claim 1 , wherein the at least one FET-type device includes a gate, further comprising a gate driver in communication with the gate and operative to provide a continuous on signal to the gate during operation of the electrical machine.

5. The solid state contactor system of claim 1 , wherein the at least one thyristor-type device includes a gate, further comprising a gate driver in communication with the gate and operative to provide a continuous off signal to the gate during steady state operation of the electrical machine.

6. The solid state contactor system of claim 5 , wherein the gate driver is operative to provide pulsed and/or continuous on signals to the at least one thyristor-type device at currents above the rated current.

7. The solid state contactor system of claim 1 , wherein the at least one FET-type device is at least two FET-type devices coupled in anti series.

8. The solid state contactor system of claim 1 , wherein the rated current is at or below a threshold current; wherein the at least one FET-type device is selected and constructed to provide a first current flow to the electrical machine below the threshold current; and wherein the at least one thyristor-type device is selected and constructed to provide a second current flow to the electrical machine in excess of the threshold current.

9. The solid state contactor system of claim 8 , wherein the threshold current is defined as a current flow at which the power loss through the at least one FET-type device equals the power loss through the at least one thyristor-type device; and wherein the at least one FET-type device and the at least one thyristor-type device are selected and constructed to have power loss profiles that achieve a threshold current at or above the rated current.

10. The solid state contactor system of claim 1 , wherein the at least one FET-type device is selected and constructed to provide current to the electrical machine at current levels up to the rated current; and wherein the at least one thyristor device is selected and constructed to provide a current flow to the electrical machine in excess of the rated current.

11. A solid state switch system constructed to connect and disconnect an electrical device to/from a power source, comprising:
a first terminal constructed for coupling to a power source;
a second terminal constructed for providing power received from the power source to the electrical device;
at least one FET-type device coupled to the first terminal and the second terminal; and
at least one thyristor-type device coupled to the first terminal and the second terminal in parallel to the at least one FET-type device,
wherein the at least one FET-type device is selected and constructed to provide a first current flow to the electrical device up to a threshold current; and wherein the at least one thyristor-type device is selected and constructed to provide a second current flow to the electrical device in excess of the threshold current;
wherein the at least one FET-type device is constructed with a first power loss profile; wherein the at least one thyristor-type device is constructed with a second power loss profile, and wherein the threshold current is based on a correlation between the first power loss profile and the second power loss profile; and
wherein the threshold current is a current flow at which the power loss through the at least one FET-type device is approximately equal to the power loss through the at least one thyristor-type device.

12. The solid state switch system of claim 11 , wherein the electrical device has a rated current; and wherein the at least one FET-type device and the at least one thyristor-type device are selected and constructed to have respective first and second power loss profiles that yield the threshold current approximately at the rated current or above the rated current.

13. The solid state switch system of claim 11 , wherein the at least one thyristor-type device includes:
a first thyristor-type device coupled directly to the first terminal and to the second terminal in parallel to the at least one FET-type device; and
a second thyristor-type device coupled directly to the first terminal and to the second terminal in anti parallel to the first thyristor-type device.

14. The solid state switch system of claim 11 , wherein the at least one FET-type device is at least two FET-type devices coupled in anti series.

15. The solid state switch system of claim 11 , wherein the at least one FET-type device and the at least one thyristor-type device are selected and constructed to share a current flowing from the power source to the electrical device.

16. The solid state switch system of claim 11 , wherein the at least one FET-type device includes a gate, further comprising a gate driver in communication with the gate and operative to provide a continuous on signal to the gate during operation of the electrical machine.

17. The solid state switch system of claim 16 , wherein the electrical device has a rated current; and wherein the at least one thyristor-type device includes a gate, further comprising a gate driver in communication with the gate and operative to provide a continuous off signal to the gate during steady state operation of the electrical device, and to provide an on signal to the gate during surges above rated current.

18. A solid state switch system constructed to connect and disconnect an electrical device to/from a power source, the electrical device having a rated current, comprising:
a first terminal constructed for coupling to a power source;
a second terminal constructed for providing power received from the power sourc

Assignees

• Abb Schweiz Ag

Inventors

• Cairoli Pietro
• Hofstetter Lukas
• Bator Matthias
• Bini Riccardo
• Rahimo Munaf

Classifications

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W72/5473

  multiple bond wires connected to a common bond pad · CPC title

• H10W72/926

  Multiple bond pads having different sizes · CPC title

• H03K2217/0036

  Means reducing energy consumption · CPC title

• H03K2017/6875

  using self-conductive, depletion FETs · CPC title