Holdup time circuit and method for bridgeless PFC converter

US10411591B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10411591-B2
Application numberUS-201715451254-A
CountryUS
Kind codeB2
Filing dateMar 6, 2017
Priority dateAug 26, 2011
Publication dateSep 10, 2019
Grant dateSep 10, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An embodiment holdup time circuit of a bridgeless power factor correction circuit comprises a charge device connected between an output terminal of a bridgeless power factor correction circuit and an energy storage apparatus, a discharge device connected between the energy storage apparatus and an input of the bridgeless power factor correction circuit, the energy storage apparatus and the bridgeless power factor correction circuit comprising a first boost converter, a second boost converter, a first switch and a second switch, wherein the first switch is connected between the first boost converter and ground and the second switch is connected between the second boost converter and ground.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit comprising: a charge device connected between an output terminal of a bridgeless power factor correction circuit and an energy storage apparatus; and a discharge device connected between the energy storage apparatus and an input of the bridgeless power factor correction circuit, wherein the discharge device comprises a switching element, and wherein: the bridgeless power factor correction circuit comprises a first boost converter, a second boost converter and an output of the first boost converter is connected to an output of the second boost converter. 2. The circuit of claim 1 , wherein: the charge device is an n-type metal oxide semiconductor transistor. 3. The circuit of claim 1 , wherein: the charge device is a diode. 4. The circuit of claim 1 , wherein: the charge device is a resistor and a diode connected in parallel. 5. The circuit of claim 1 , wherein: the discharge device is an n-type metal oxide semiconductor transistor. 6. The circuit of claim 1 , further comprising: a surge protection diode, wherein the discharge device and the surge protection diode are in one single device. 7. The circuit of claim 1 , wherein: the discharge device is formed by two n-type metal oxide semiconductor transistors. 8. The circuit of claim 7 , wherein: a first transistor of the discharge device is connected to an input terminal of the first boost converter; and a second transistor of the discharge device is connected to an input terminal of the second boost converter. 9. The circuit of claim 8 , wherein: a body diode of the first transistor is configured to operate as a surge protection diode for the first boost converter; and a body diode of the second transistor is configured to operate as a surge protection diode for the second boost converter. 10. A system comprising: a bridgeless power factor correction circuit comprising a first boost converter coupled between a first terminal of an input ac source and an output, a second boost converter coupled between a second terminal of the input ac source and the output, a first switch coupled between an input of the first boost converter and ground and a second switch coupled between an input of the second boost converter and ground; a plurality of surge protection diodes connected between the input ac source and the output; a charge device connected between an output terminal of the bridgeless power factor correction circuit and an energy storage apparatus; and a discharge device connected between the energy storage apparatus and an input of the bridgeless power factor correction circuit. 11. The system of claim 10 , wherein the plurality of surge protection diodes comprises: a first surge protection diode coupled between the input of the first boost converter and the output; and a second surge protection diode coupled between the input of the second boost converter and the output. 12. The system of claim 10 , wherein: the charge device is a diode coupled between a first inductor of the first boost converter and the energy storage apparatus; and the discharge device is a switching element coupled between the energy storage apparatus and the input of the second boost converter. 13. The system of claim 10 , wherein: the charge device is a diode coupled between a second inductor of the second boost converter and the energy storage apparatus; and the discharge device is a switching element coupled between the energy storage apparatus and the input of the first boost converter. 14. The system of claim 10 , wherein: the charge device is a first switching element coupled between the output terminal of the bridgeless power factor correction circuit and the energy storage apparatus; and the discharge device is a second switching element coupled between the energy storage apparatus and the input of the bridgeless power factor correction circuit. 15. The system of claim 10 , wherein: the charge device is a first switching element coupled between the output terminal of the bridgeless power factor correction circuit and the energy storage apparatus; and the discharge device is formed by a second switching element and a third switching element connected to the first terminal and the second terminal of the input ac source, respectively. 16. A method comprising: charging an energy storage apparatus through a charge device, wherein the charge device is connected between an output of a bridgeless power factor correction circuit and the energy storage apparatus; and discharging the energy storage apparatus through a discharge device, wherein the discharge device is connected between the energy storage apparatus and an input of the bridgeless power factor correction circuit, wherein the discharge device comprises a switching element. 17. The method of claim 16 , further comprising: detecting a first half cycle of an input ac source connected to the bridgeless power factor correction circuit comprising two boost converters; activating a first boost converter and a second switch coupled between an input of a second boost converter and ground; and charging the energy storage apparatus from the first boost converter through the charge device. 18. The method of claim 16 , further comprising: detecting a second half cycle of an input ac source connected to the bridgeless power factor correction circuit comprising two boost converters; activating a second boost converter and a first switch coupled between an input of a first boost converter and ground; and charging the energy storage apparatus from the second boost converter through the charge device. 19. The method of claim 16 , further comprising: detecting, by a controller, a dropout of an input ac source connected to the bridgeless power factor correction circuit; and activating the discharge device in response to the dropout. 20. The method of claim 19 , wherein: the controller is configured to control the charge device, the discharge device and the bridgeless power factor correction circuit.

Assignees

Inventors

Classifications

  • Means for protecting converters other than automatic disconnection · CPC title

  • using semiconductor devices only · CPC title

  • using discharge tubes without control electrode or semiconductor devices without control electrode · CPC title

  • Cross-Sectional Technologies · mapped topic

  • H02M1/4208Primary

    Arrangements for improving power factor of AC input · CPC title

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What does patent US10411591B2 cover?
An embodiment holdup time circuit of a bridgeless power factor correction circuit comprises a charge device connected between an output terminal of a bridgeless power factor correction circuit and an energy storage apparatus, a discharge device connected between the energy storage apparatus and an input of the bridgeless power factor correction circuit, the energy storage apparatus and the brid…
Who is the assignee on this patent?
Futurewei Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H02M1/4208. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 10 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).