Thin-film transistor and manufacturing method for same
US-2016300954-A1 · Oct 13, 2016 · US
US10411074B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10411074-B2 |
| Application number | US-201715814748-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 16, 2017 |
| Priority date | Nov 30, 2016 |
| Publication date | Sep 10, 2019 |
| Grant date | Sep 10, 2019 |
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An organic light-emitting display device includes a substrate; a switching thin-film transistor on the substrate; a driving thin-film transistor connected to the switching thin-film transistor; and a light-emitting element connected to the driving thin-film transistor, wherein the switching thin-film transistor and the driving thin-film transistor together include: a lower conductive layer on the substrate; an insulation layer having therein a contact hole configured to expose the lower conductive layer; an upper conductive layer connected to the lower conductive layer through the contact hole; and a mask conductive layer between an upper surface of the insulation layer and the upper conductive layer to overlap the upper conductive layer.
Opening claim text (preview).
What is claimed is: 1. An organic light-emitting display device, comprising: a substrate; a switching thin-film transistor on the substrate; a driving thin-film transistor connected to the switching thin-film transistor; and a light-emitting element connected to the driving thin-film transistor, wherein the switching thin-film transistor and the driving thin-film transistor together include: a lower conductive layer on the substrate; an insulation layer having therein a contact hole configured to expose the lower conductive layer; an upper conductive layer connected to the lower conductive layer through the contact hole; and a mask conductive layer between an upper surface of the insulation layer and the upper conductive layer to overlap the upper conductive layer. 2. The device according to claim 1 , wherein the upper conductive layer is a drain electrode of the switching thin-film transistor, and wherein the lower conductive layer is a gate electrode of the driving thin-film transistor. 3. The device according to claim 2 , further comprising a storage capacitor connected to each of the switching thin-film transistor and the driving thin-film transistor, wherein the upper conductive layer is a drain electrode of the driving thin-film transistor, and wherein the lower conductive layer is a storage electrode of the storage capacitor. 4. The device according to claim 1 , wherein the contact hole has a line width of 2 μm or less. 5. The device according to claim 1 , wherein the insulation layer is of an inorganic insulation material, and wherein the mask conductive layer is a single-layer structure or a multilayered structure of least one of ITO, MoTi, and Al. 6. The device according to claim 1 , wherein the mask conductive layer has a mask hole configured to overlap the contact hole. 7. A display device substrate, comprising: a base substrate; a lower conductive layer on the base substrate; an insulation layer having therein a contact hole configured to expose the lower conductive layer; an upper conductive layer connected to the lower conductive layer through the contact hole; and a mask conductive layer between an upper surface of the insulation layer and the upper conductive layer to overlap the upper conductive layer. 8. The display device substrate according to claim 7 , wherein the insulation layer is of an inorganic insulation material, and wherein the mask conductive layer is a single-layer structure or a multilayered structure of at least one of ITO, MoTi, and Al. 9. The display device substrate according to claim 7 , wherein the mask conductive layer has a mask hole configured to overlap the contact hole. 10. A method of manufacturing a display device substrate, comprising: forming a lower conductive layer on a base substrate; forming an insulation layer, having therein a contact hole configured to expose the lower conductive layer, and a mask conductive layer; and forming an upper conductive layer connected to the lower conductive layer through the contact hole, wherein the mask conductive layer is disposed between an upper surface of the insulation layer and the upper conductive layer to overlap the upper conductive layer. 11. The method according to claim 10 , wherein the forming the insulation layer and the mask conductive layer includes: sequentially stacking the insulation layer and the mask conductive layer to cover the lower conductive layer; wet-etching the mask conductive layer; and dry-etching the insulation layer, wherein the forming the upper conductive layer includes removing the mask conductive layer that does not overlap the upper conductive layer. 12. The method according to claim 10 , wherein the insulation layer is formed of an inorganic insulation material, and wherein the mask conductive layer is formed as a single-layer structure or a multilayered structure using at least one of ITO, MoTi, and Al.
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