Method of forming semiconductor devices having threshold switching devices

Patent metadata

Field	Value
Publication number	US-10403818-B2
Application number	US-201715401474-A
Country	US
Kind code	B2
Filing date	Jan 9, 2017
Priority date	Aug 3, 2016
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

Forming a semiconductor device that includes a memory cell array may include performing a switching firing operation on one or more memory cells of the memory array to cause a threshold voltage distribution associated with threshold switching devices in the memory cells to be reduced. The switching device firing operation may be performed such that the threshold voltage distribution is reduced while maintaining the one or more threshold switching devices in the amorphous state. Performing the switching device firing operation on a threshold switching device may include heating the threshold switching device, applying a voltage to the threshold switching device, applying a current to the threshold switching device, some combination thereof, or the like.

First claim

What is claimed is:

1. A method, comprising:
forming a memory cell array on a semiconductor substrate, the memory cell array including,
a set of first conductive lines,
a set of second conductive lines extending substantially perpendicularly to the first conductive lines, and
a set of memory cells between the first conductive lines and the second conductive lines, the memory cells including data storage elements and threshold switching devices in an amorphous phase, each threshold switching device associated with a particular threshold voltage such that the threshold switching device is configured to change resistance based on a magnitude of a voltage applied on the threshold switching device at least meeting the particular threshold voltage associated with the threshold switching device, respectively; and

performing a switching device firing operation on the memory cell array while maintaining the threshold switching devices in an amorphous state, such that
a variation, across the threshold switching devices of the memory cell array, of the threshold voltages associated with the threshold switching devices is reduced, and
a standard deviation of a threshold voltage distribution that is a distribution of the threshold voltages associated with the threshold switching devices is reduced, the threshold voltage distribution indicating variation of associated threshold voltage between the threshold switching devices.

2. The method of claim 1 , wherein the performing the switching device firing operation includes,
increasing a magnitude of a voltage applied to the threshold switching devices to a target voltage magnitude,
maintaining the magnitude of the applied voltage at the target voltage magnitude for a particular period of time, and
reducing the magnitude of the applied voltage from the target voltage magnitude.

3. The method of claim 2 , wherein the target voltage magnitude is greater than a threshold voltage magnitude associated with the threshold switching devices.

4. The method of claim 2 , wherein the performing the switching device firing operation includes,
increasing a magnitude of a voltage applied to the threshold switching devices to a target voltage magnitude over a first period of time,
maintaining the magnitude of the applied voltage at the target voltage magnitude for a second period of time, and
dropping the magnitude of the applied voltage from the target voltage magnitude over a third period of time, and
the first period of time is greater than the third period of time.

5. The method of claim 1 , wherein the performing the switching device firing operation includes applying a positive voltage pulse to the threshold switching devices, subsequently to applying a negative voltage pulse to the threshold switching devices.

6. The method of claim 1 , wherein,
the performing the switching device firing operation includes,
increasing a magnitude of a current applied to a target current magnitude over a first period of time,
maintaining the magnitude of the applied current at the target current magnitude for a second period of time, and
dropping the magnitude of the current from the target current magnitude over a third period of time, and

the first period of time is greater than the third period of time.

7. The method of claim 1 , wherein the performing the switching device firing operation includes applying a voltage or a current to the threshold switching devices while the threshold switching devices are heated to a temperature that is greater than room temperature and is associated with a state of non-crystallization being maintained in the threshold switching devices.

8. The method of claim 1 , wherein the performing the switching device firing operation includes heating the threshold switching devices to a temperature of about 100° C. to about 150° C.

9. The method of claim 1 , wherein the performing the switching device firing operation includes applying a plurality of voltage cycles to the second conductive lines, each voltage cycle including sequentially applying a first voltage and a second voltage to the second conductive lines, a magnitude of the first voltage being greater than a threshold voltage magnitude associated with the switching devices, and a magnitude of the second voltage being lower than the magnitude of the first voltage.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yang Min Kyu
• Park Seong Geon
• Seong Dong Jun
• Ahn Dong Ho
• Lee Jung Moo
• Choi Seol
• Horii Hideki

Classifications

• G11C2013/0083

  Write to perform initialising, forming process, electro forming or conditioning · CPC title

• G11C13/0007

  comprising metal oxide memory material, e.g. perovskites · CPC title

• G11C2213/76

  Array using an access device for each cell which being not a transistor and not a diode · CPC title

• G11C13/0004 Primary

  comprising amorphous/crystalline phase transition cells · CPC title

• G11C13/0021

  Auxiliary circuits · CPC title