Dielectric metal oxide cap for channel containing germanium

Patent metadata

Field	Value
Publication number	US-10403733-B2
Application number	US-201515776752-A
Country	US
Kind code	B2
Filing date	Dec 24, 2015
Priority date	Dec 24, 2015
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

Embodiments of the present disclosure describe semiconductor devices comprised of a semiconductor substrate with a metal oxide semiconductor field effect transistor having a channel including germanium or silicon-germanium, where a dielectric layer is coupled to the channel. The dielectric layer may include a metal oxide and at least one additional element, where the at least one additional element may increase a band gap of the dielectric layer. A gate electrode may be coupled to the dielectric layer. Other embodiments may be described and/or claimed.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a transistor formed on a semiconductor substrate and having a channel including a germanium semiconductor or a silicon-germanium semiconductor;
a dielectric layer with a first surface coupled to the channel and including a metal oxide to modulate a band gap of the dielectric layer, wherein the metal oxide includes a ternary oxide having a first element, an additional element, and oxygen (O), wherein the first element is titanium (Ti) or tantalum (Ta), and the additional element is aluminum (Al), zirconium (Zr), or hafnium (Hf); and
a gate electrode coupled to a second surface of the dielectric layer, the second surface opposite the first surface through a thickness of the dielectric layer.

2. The semiconductor device of claim 1 , wherein the semiconductor substrate is a silicon semiconductor, a germanium semiconductor, or a silicon-germanium semiconductor.

3. The semiconductor device of claim 1 , wherein the metal oxide is titanium dioxide and the additional element is aluminum.

4. The semiconductor device of claim 1 , wherein the dielectric layer has a first concentration of the additional element at the first surface and a second concentration of the additional element at the second surface, wherein the first concentration is lower than the second concentration.

5. The semiconductor device of claim 4 , wherein the concentration of the additional element increases monotonically through the thickness of the dielectric layer from the first surface to the second surface.

6. The semiconductor device of claim 4 , wherein the first concentration is from about 0% to about 30% by weight and the second concentration is from about 30% to about 70% by weight, wherein a balance of a weight percentage is metal of the metal oxide.

7. The semiconductor device of claim 4 , wherein the first concentration, the second concentration, and a concentration profile through the thickness of the dielectric layer of the additional element are selected to increase the band gap of the metal oxide of the dielectric layer by at least three electron volts.

8. The semiconductor device of claim 1 , wherein the transistor is a tri-gate transistor having a fin coupled to and extending from the semiconductor substrate and spanning a source, a gate, and a drain of the tri-gate transistor, wherein the channel includes a top surface and two opposite side surfaces of the fin spanning the gate between the source and the drain, wherein the fin is composed of the germanium semiconductor or the silicon-germanium semiconductor.

9. The semiconductor device of claim 8 , wherein the fin and the semiconductor substrate are a single body composed of the germanium semiconductor or the silicon-germanium semiconductor.

10. A process for fabricating a semiconductor device, comprising:
providing a semiconductor substrate with a transistor disposed on the semiconductor substrate and having a channel including a germanium semiconductor or silicon-germanium semiconductor; and
forming a dielectric layer on an exposed surface of the channel, wherein the dielectric layer includes a metal oxide, wherein the metal oxide includes a ternary oxide having a first element, an additional element, and oxygen (O), wherein the first element is titanium (Ti) or tantalum (Ta), and the additional element is aluminum (Al), zirconium (Zr), or hafnium (Hf), and wherein forming the dielectric layer includes
depositing a first layer of the metal oxide with the additional element at a first concentration,
depositing a middle layer of the metal oxide with the additional element at a middle layer concentration, and
depositing a last layer of the metal oxide with the additional element at a second concentration, wherein the first concentration is lower than the second concentration.

11. The process of claim 10 , wherein the semiconductor substrate is a silicon semiconductor, a germanium semiconductor, or a silicon-germanium semiconductor.

12. The process of claim 10 , wherein the metal oxide is titanium dioxide and the additional element is aluminum.

13. The process of claim 10 , wherein the middle layer includes at least two additional layers, wherein the middle layer concentration of the additional element increases monotonically during forming of the dielectric layer.

14. The process of claim 10 , wherein the first concentration is from about 0% to about 30% by weight and the second concentration is from about 30% to about 70% by weight, wherein a balance of a weight percentage is metal of the metal oxide.

15. The process of claim 10 , wherein the transistor is a tri-gate transistor having a fin coupled to and extending from the semiconductor substrate and spanning a source, a gate, and a drain of the tri-gate transistor, wherein the channel includes a top surface and two opposite side surfaces of the fin spanning the gate between the source and the drain, wherein the fin is composed of the germanium semiconductor or the silicon-germanium semiconductor.

16. The process of claim 15 , wherein the fin and the semiconductor substrate are a single body composed of the germanium semiconductor or the silicon-germanium semiconductor.

17. A computing device, comprising:
a circuit board; and
a semiconductor device coupled to the circuit board and including a plurality of tri-gate transistors disposed on the semiconductor device, wherein one or more of the tri-gate transistors include
a channel including a germanium semiconductor or a silicon-germanium semiconductor,
a dielectric layer with a first surface coupled to the channel and including a metal oxide to modulate a band gap of the dielectric layer, wherein the metal oxide includes a ternary oxide having a first element, an additional element, and oxygen (O), wherein the first element is titanium (Ti) or tantalum (Ta), and the additional element is aluminum (Al), zirconium (Zr), or hafnium (Hf), and
a gate electrode coupled to a second surface of the dielectric layer, the second surface opposite the first surface through a thickness of the dielectric layer, wherein a concentration of the additional element increases monotonically from the first surface to the second surface.

18. The computing device of claim 17 , wherein a first concentration is from 0% to about 30% by weight and a second concentration is from about 30% to about 70% by weight, wherein a balance of a weight percentage is metal of the metal oxide.

19. The computing device of claim 17 , wherein the metal oxide is titanium dioxide and the additional element is aluminum.

20. The computing device of claim 17 , wherein the computing device is a wearable device or a mobile computing device, the wearable device or the mobile computing device including one or more of an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, a Geiger counter, an accelerometer, a gyroscope, a speaker, or a camera coupled with the circuit board.

Assignees

• Intel Corp

Inventors

• Dewey Gilbert
• Agrawal Ashish
• Chu-Kung Benjamin
• Le Van H
• Metz Matthew V
• Rachmady Willy
• Kavalieros Jack T
• Rios Rafael

Classifications

• H01L29/517

  Electricity · mapped topic

• H01L29/7851

  Electricity · mapped topic

• H01L29/78

  Electricity · mapped topic

• H01L29/785

  Electricity · mapped topic

• H01L29/66795

  Electricity · mapped topic