System and method for detecting false sharing

Patent metadata

Field	Value
Publication number	US-10402292-B2
Application number	US-201715584749-A
Country	US
Kind code	B2
Filing date	May 2, 2017
Priority date	Jul 26, 2013
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

In one embodiment, a method of false sharing detection includes performing, by a device, a plurality of optimization passes on source code, to produce optimized source code and receiving, by the device, selection criteria, The method also includes adding instrumentation to the optimized source code, by the device, after performing the plurality of optimization passes, to produce an instrumented code, where the instrumentation is configured to track memory access addresses and access types of global variables and heap variables in accordance with the selection criteria.

First claim

What is claimed is:

1. A method of false sharing detection, the method comprising:
performing, by a computing device, a plurality of optimization passes on source code, to produce optimized source code;
receiving, by the computing device, selection criteria, the selection criteria indicating items to be instrumented, items not to be instrumented, or a combination of items to be instrumented and items not to be instrumented; and
adding instrumentation to the optimized source code, by the computing device, during compilation of the source code and after performing the plurality of optimization passes, to produce an instrumented code, wherein the instrumentation is configured to track, in accordance with execution of the instrumented code in a run-time environment that includes a plurality of central processing unit (CPU) cores, memory access addresses and access types of global variables and heap variables in accordance with the selection criteria to facilitate detection of false sharing between cache lines of the CPU.

2. The method of claim 1 , wherein adding the instrumentation into the optimized source code comprises inserting instrumentation for read accesses and for write accesses.

3. The method of claim 1 , wherein adding the instrumentation into the optimized source code comprises inserting instrumentation for write accesses and not inserting instrumentation for read accesses.

4. The method of claim 1 , wherein the selection criteria comprises a black list of items not to be instrumented.

5. The method of claim 1 , wherein the selection criteria comprises a red list of items to be instrumented.

6. The method of claim 1 , wherein the selection criteria indicates that all items be instrumented.

7. The method of claim 1 , wherein receiving the selection criteria comprises receiving the selection criteria from a user.

8. A computing device comprising:
a non-transitory memory storage comprising instructions; and
one or more processors in communication with the memory, wherein the one or more processors execute the instructions to:
perform a plurality of optimization passes on source code, to produce optimized source code;
receive selection criteria, the selection criteria indicating items to be instrumented, items not to be instrumented, or a combination of items to be instrumented and items not to be instrumented; and
add instrumentation to the optimized source code during compilation of the source code and after performing the plurality of optimization passes, to produce an instrumented code, wherein the instrumentation is configured to track, in accordance with execution of the instrumented code in a run-time environment that includes a plurality of central processing unit (CPU) cores, memory access addresses and access types of global variables and heap variables in accordance with the selection criteria to facilitate detection of false sharing between cache lines of the CPU.

9. The computing device of claim 8 , wherein the instructions to add the instrumentation into the optimized source code comprise instructions to insert instrumentation for read accesses and for write accesses.

10. The computing device of claim 8 , wherein the instructions to add the instrumentation into the optimized source code comprise instructions to insert instrumentation for write accesses and not inserting instrumentation for read accesses.

11. The computing device of claim 8 , wherein the selection criteria comprises a black list of items not to be instrumented.

12. The computing device of claim 8 , wherein the selection criteria comprises a red list of items to be instrumented.

13. The computing device of claim 8 , wherein the selection criteria indicates that all items be instrumented.

14. The computing device of claim 8 , wherein the instructions to receive the selection criteria comprise instructions to receive the selection criteria from a user.

15. A non-transitory computer-readable media storing computer instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
performing a plurality of optimization passes on source code, to produce optimized source code;
receiving selection criteria, the selection criteria indicating items to be instrumented, items not to be instrumented, or a combination of items to be instrumented and items not to be instrumented; and
adding instrumentation to the optimized source code after performing the plurality of optimization passes, to produce an instrumented code, wherein the instrumentation is configured to track, in accordance with execution of the instrumented code in a run-time environment that includes a plurality of central processing unit (CPU) cores, memory access addresses and access types of global variables and heap variables in accordance with the selection criteria to facilitate detection of false sharing between cache lines of the CPU.

16. The non-transitory computer-readable media of claim 15 , wherein adding the instrumentation into the optimized source code comprises inserting instrumentation for read accesses and for write accesses.

17. The non-transitory computer-readable media of claim 15 , wherein adding the instrumentation into the optimized source code comprises inserting instrumentation for write accesses and not inserting instrumentation for read accesses.

18. The non-transitory computer-readable media of claim 15 , wherein the selection criteria comprises a black list of items not to be instrumented.

19. The non-transitory computer-readable media of claim 15 , wherein the selection criteria comprises a red list of items to be instrumented.

20. The non-transitory computer-readable media of claim 15 , wherein the selection criteria indicates that all items be instrumented.

Assignees

• Futurewei Technologies Inc

Inventors

• Liu Tongping
• Tian Chen
• Hu Ziang

Classifications

• G06F11/3428

  Benchmarking · CPC title

• G06F2212/507

  using speculative control · CPC title

• G06F11/3037

  where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

• G06F11/3093

  Configuration details thereof, e.g. installation, enabling, spatial arrangement of the probes · CPC title

• G06F11/3089

  Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents (software debugging using additional hardware using a specific debug interface G06F11/3656; performance evaluation by tracing or monitoring G06F11/3466) · CPC title