Circuit arrangement for determining the cell voltage of an individual cell in a cell grouping

Patent metadata

Field	Value
Publication number	US-10401437-B2
Application number	US-201715419752-A
Country	US
Kind code	B2
Filing date	Jan 30, 2017
Priority date	Jan 30, 2016
Publication date	Sep 3, 2019
Grant date	Sep 3, 2019

Abstract

A circuit arrangement is for determining the cell voltage of an individual cell in a cell grouping of a series circuit of individual cells of an accumulator pack. Potential points are formed between electrically adjacent individual cells of the series circuit. The potentials of the potential points which follow one another in the series circuit increase in absolute value starting from a reference potential. Each potential point is connected to a measuring input of an evaluation device via a measuring resistor and a switch. In order to measure the cell voltage of an individual cell, the measuring input is connected to the reference potential via a capacitor. The evaluation device registers the charging time of the capacitor to a predefined voltage. On the basis of the registered charging time, the evaluation device determines the cell voltage of the measured individual cell.

First claim

What is claimed is:

1. A circuit arrangement for determining a cell voltage of an individual cell in a cell grouping, the circuit arrangement comprising:
a series circuit having a plurality of individual cells of a battery pack;
said plurality of individual cells being arranged in series starting at a reference potential;
mutually adjacent ones of said plurality of individual cells having respective potential points therebetween;
successive ones of said potential points having respective successively increasing absolute potentials with respect to said reference potential;
an evaluation unit having a measurement input;
each of said potential points being connected to said measurement input of said evaluation unit via a respective measurement resistance and a respective switch;
said measurement resistances including a first measurement resistance;
said potential points including a first potential point connected with said first measurement resistance to said measurement input and successive ones of said potential points each being connected to said measurement input via measurement resistances of increasing value;
a measurement capacitor;
said measurement input being connected to said reference potential via said measurement capacitor;
wherein the increasing values of said measurement resistances are selected such that comparable measurement values can be tapped at said measurement capacitor independently of said respective switch selected;
said evaluation unit being configured to determine a load time t i of said measurement capacitor to a predetermined measurement voltage; and,
said evaluation unit being further configured to determine the cell voltage of a respective one of said individual cells on the basis of said load time t i.

2. The circuit arrangement of claim 1 , wherein said measurement voltage is less than the cell voltage of the individual cell.

3. A circuit arrangement for determining a cell voltage of an individual cell in a cell grouping, the circuit arrangement comprising:
a series circuit having a plurality of individual cells of a battery pack;
said plurality of individual cells being arranged in series starting at a reference potential;
mutually adjacent ones of said plurality of individual cells having respective potential points therebetween;
successive ones of said potential points having respective successively increasing absolute potentials with respect to said reference potential;
an evaluation unit having a measurement input;
each of said potential points being connected to said measurement input of said evaluation unit via a respective measurement resistance and a respective switch;
a measurement capacitor;
said measurement input being connected to said reference potential via said measurement capacitor;
said evaluation unit being configured to determine a load time t i of said measurement capacitor to a predetermined measurement voltage;
said evaluation unit being further configured to determine the cell voltage of a respective one of said individual cells on the basis of said load time t i ; and

wherein said load time t i of said measurement capacitor to the measurement voltage is determined via a counter configured to start at the beginning of a measurement and to stop when the predetermined measurement voltage is reached.

4. The circuit arrangement of claim 3 , wherein said counter has a counter status; and, said counter status is configured to be proportional to the load time t i of said measurement capacitor to said measurement voltage.

5. The circuit arrangement of claim 4 , wherein said counter defines counter units corresponding to a predetermined time unit.

6. The circuit arrangement of claim 5 , wherein said counter is configured to count pulses of a timing element.

7. The circuit arrangement of claim 3 further comprising:
a comparator having a first comparator input and a second comparator input;
said measurement capacitor having a measurement capacitor voltage applied to said first comparator input; and,
said second comparator input having a reference value corresponding to said predetermined measurement voltage applied thereto.

8. The circuit arrangement of claim 7 , wherein said comparator has an output applied to said counter as a control signal.

9. The circuit arrangement of claim 8 , wherein said comparator for comparing said measurement capacitor voltage with said reference value is formed as an integral component of a microprocessor.

10. The circuit arrangement of claim 3 , wherein:
said counter has a counter status; and,
said evaluation unit is formed in a microprocessor and is configured to convert said counter status into a cell voltage of the individual cell being measured.

11. The circuit arrangement of claim 10 , wherein said counter is an integral component of said microprocessor.

12. The circuit arrangement of claim 11 , wherein said microprocessor includes an internal clock configured to output a clock pulse; and, said counter is configured to count said clock pulse outputted by said internal clock.

Assignees

• Stihl Ag & Co Kg Andreas

Inventors

• Schurr Martin
• Liebhard Gernot
• Heigemeyr Christian
• Kulzer Markus

Classifications

• G01R31/3835

  involving only voltage measurements · CPC title

• G01R19/16542

  for batteries (charge condition monitoring in G01R31/36) · CPC title

• G01R31/367

  Software therefor, e.g. for battery testing using modelling or look-up tables · CPC title

• G01R31/396 Primary

  Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery · CPC title