Retaining ring for lower wafer defects

US10399202B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10399202-B2
Application numberUS-201615074089-A
CountryUS
Kind codeB2
Filing dateMar 18, 2016
Priority dateMar 19, 2015
Publication dateSep 3, 2019
Grant dateSep 3, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A retaining ring and a chemical mechanical planarization system (CMP) are disclosed. In one embodiment, a retaining ring for a polishing system includes a ring-shaped body having a polished inner diameter. The body has a bottom surface having grooves formed therein, an outer diameter wall, and an inner diameter wall, wherein the inner diameter wall is polished to a roughness average (Ra) of less than about 30 microinches (μin).

First claim

Opening claim text (preview).

What is claimed is: 1. A retaining ring for a polishing system, the retaining ring comprising: a ring-shaped body having: an upper portion comprising: a bottom surface having a tab extending therefrom; an upper inner diameter wall having an inside diameter suitable to accommodate a semiconductor substrate therein, wherein the upper inner diameter wall is polished to a upper wall roughness average (Ra) of about 4 microinches (μin); a polished upper outer diameter wall; a lower portion concentric with the upper portion, the lower portion comprising: a bottom surface having grooves formed therein, a lower outer diameter wall wherein the polished upper outer diameter wall has a diameter greater than a diameter of the lower outer diameter wall; and a lower inner diameter wall having a diameter selected to accommodate a semiconductor substrate, wherein the lower inner diameter wall is polished to a lower wall roughness average (Ra) of about 2 microinches (μin) wherein the upper wall roughness average is greater than the lower wall roughness average. 2. The retaining ring of claim 1 , wherein the upper portion is comprised of a metal and the lower portion is comprised of a plastic. 3. The retaining ring of claim 1 , wherein the inner diameter wall is configured to receive a semiconductor substrate having a diameter of 200 mm, 300 mm or 450 mm. 4. The retaining ring of claim 1 , wherein the outer diameter is polished to a roughness averaged of less than about 30 μin. 5. A CMP system comprising: a rotatable platen configured to support a polishing pad; a polishing head configured to urge a substrate against the polishing pad during polishing; and a retaining ring comprising: an upper portion comprising: a bottom surface having a tab extending therefrom; an upper inner diameter wall having an inside diameter suitable to accommodate a semiconductor substrate therein, wherein the upper inner diameter wall is polished to a upper wall roughness average (Ra) of about 4 microinches (μin); a polished upper outer diameter wall; a lower portion concentric with the upper portion, the lower portion comprising: a bottom surface having grooves formed therein, a lower outer diameter wall wherein the polished upper outer diameter wall has a diameter greater than a diameter of the lower outer diameter wall; and a lower inner diameter wall having a diameter selected to accommodate a semiconductor substrate, wherein the lower inner diameter wall is polished to a lower wall roughness average (Ra) of about 2 microinches (μin) wherein the upper wall roughness average is greater than the lower wall roughness average. 6. The CMP system of claim 5 , wherein the upper portion is comprised of a metal and the lower portion is comprised of a plastic. 7. The CMP system of claim 5 , wherein the inner diameter wall is configured to receive a semiconductor substrate having a diameter of 200 mm, 300 mm or 450 mm. 8. The CMP system of claim 5 , wherein the outer diameter is polished to a roughness averaged of less than about 30 μin.

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What does patent US10399202B2 cover?
A retaining ring and a chemical mechanical planarization system (CMP) are disclosed. In one embodiment, a retaining ring for a polishing system includes a ring-shaped body having a polished inner diameter. The body has a bottom surface having grooves formed therein, an outer diameter wall, and an inner diameter wall, wherein the inner diameter wall is polished to a roughness average (Ra) of les…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification B24B37/32. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Sep 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).