Molded intelligent power module and method of making the same

US10396019B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10396019-B2
Application numberUS-201816170895-A
CountryUS
Kind codeB2
Filing dateOct 25, 2018
Priority dateOct 16, 2016
Publication dateAug 27, 2019
Grant dateAug 27, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth metal-oxide-semiconductor field-effect transistors (MOSFETs), a tie bar, a metal slug, a plurality of spacers, a plurality of leads and a molding encapsulation. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth MOSFETs, the tie bar and the plurality of spacers. A bottom surface of the metal slug is exposed from the molding encapsulation. A process for fabricating the IPM comprises preparing the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth MOSFETs, the tie bar, the plurality of leads, the metal slug and the plurality of spacers and applying a molding process to form the molding encapsulation.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for fabricating an intelligent power module (IPM) for driving a motor, the method comprising the steps of: providing a leadframe comprising a first, second, third and fourth die paddles and a plurality of leads; providing a first transistor attached to a top surface of the first die paddle, a second transistor attached to a top surface of the second die paddle, a third transistor attached to a top surface of the third die paddle, a fourth, fifth, and sixth transistors attached to a top surface of the fourth die paddle; electrically connecting the first, second, third, fourth, fifth, and sixth transistors to the plurality of leads respectively; providing a metal slug and a plurality of spacers; wherein the plurality of spacers are between the metal slug and the first, second, third and fourth die paddles; and wherein the plurality of spacers separate the metal slug from contacting the first, second, third, and fourth die paddles; and applying a molding process to form a molding encapsulation enclosing the first, second, third, and fourth die paddles, the first, second, third, fourth, fifth, and sixth transistors and the plurality of spacers. 2. The method of claim 1 , before the step of applying the molding process to form the molding encapsulation, forming a first, second, third and fourth location pins; placing the metal slug in a location so that the first location pin is disposed adjacent to a first side of the metal slug; the second location pin is disposed adjacent to a second side of the metal slug; the third location pin is disposed adjacent to a third side of the metal slug; and the fourth location pin is disposed adjacent to a fourth side of the metal slug. 3. The method of claim 1 , before the step of providing the metal slug and the plurality of spacers, applying a plurality of wire bonding processes to connect an integrated circuit (IC) to the first, second, third, fourth, fifth, and sixth transistors and a portion of the plurality of leads. 4. The method of claim 1 , before the step of providing the metal slug and the plurality of spacers, applying a first plurality of wire bonding processes to connect a low voltage integrated circuit (IC) to the first, second and third transistors and a first portion of the plurality of leads; and applying a second plurality of wire bonding processes to connect a high voltage IC to the fourth, fifth, and sixth transistors and a second portion of the plurality of leads. 5. The method of claim 1 , wherein the step of providing the metal slug and the plurality of spacers comprises the sub-steps of printing and curing the plurality of spacers on the metal slug so that bottom surfaces of the plurality of spacers directly contact a top surface of the metal slug; and placing the first, second, third and fourth die paddles on top of the plurality of spacers so that bottom surfaces of the first, second, third and fourth die paddles directly contact top surfaces of the plurality of spacers. 6. The method of claim 1 , after the step of applying the molding process to form the molding encapsulation, grinding a bottom surface of the molding encapsulation so that the bottom surface of the metal slug is exposed from the molding encapsulation.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between laterally-adjacent chips · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • comprising copper [Cu] · CPC title

  • comprising gold [Au] · CPC title

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Frequently asked questions

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What does patent US10396019B2 cover?
An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth metal-oxide-semiconductor field-effect transistors (MOSFETs), a tie bar, a metal slug, a plurality of spacers, a plurality of leads and a molding encapsulation. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, …
Who is the assignee on this patent?
Alpha & Omega Semiconductor Cayman Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/811. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 27 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).