Methods of forming substrate structures and semiconductor components

US10388736B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10388736-B2
Application numberUS-201715695526-A
CountryUS
Kind codeB2
Filing dateSep 5, 2017
Priority dateMar 17, 2016
Publication dateAug 20, 2019
Grant dateAug 20, 2019

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Abstract

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In an embodiment, a method includes forming an intentionally doped superlattice laminate on a support substrate, forming a Group III nitride-based device having a heterojunction on the superlattice laminate layer, and forming a charge blocking layer between the heterojunction and the superlattice laminate.

First claim

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What is claimed is: 1. A method, comprising: forming an intentionally doped superlattice laminate on a support substrate; forming a Group III nitride-based device comprising a heterojunction on the superlattice laminate layer; and forming a charge blocking layer between the heterojunction and the superlattice laminate. 2. The method of claim 1 , further comprising: forming an intentionally doped leakage current reduction layer on the superlattice laminate layer, the intentionally doped leakage current reduction layer comprising leakage current compensating dopants and charge trap centres, wherein the charge blocking layer is formed between the heterojunction and the intentionally doped leakage current reduction layer. 3. The method of claim 1 , further comprising: doping the superlattice laminate to a dopant concentration of at least 10 18 /cm 3 . 4. The method of claim 3 , wherein the superlattice laminate is doped with carbon, wherein the carbon concentration is at least 10 18 /cm 3 . 5. The method of claim 1 , wherein forming the superlattice laminate comprises: forming alternate first layers and second layers, wherein the first layers comprise B a1 Al b1 Ga c1 In d1 N material, wherein 0≤a 1 ≤1, 0≤b 1 ≤1, 0≤c 1 ≤1, 0≤d 1 ≤1 and (a 1 +b 1 +c 1 +d 2 )=1, wherein the second layers comprise B a2 Al b2 Ga c2 In d2 N material, wherein 0≤a 2 ≤1, 0≤b 2 ≤1, 0≤c 2 ≤1, 0≤d 2 ≤1 and (a 2 +b 2 +c 2 +d 2 )=1, wherein the band gap of the second layer material is different from that of the first layer material. 6. The method of claim 5 , wherein the superlattice laminate is doped with carbon at a carbon concentration of at least 10 18 /cm 3 . 7. A method, comprising: forming a buffer structure on a support substrate, the buffer structure comprising an intentionally doped superlattice laminate; forming an unintentionally doped first Group III nitride layer on the buffer structure; forming a second Group III nitride layer on the first Group III nitride layer to form a heterojunction therebetween; forming a source, a drain and a gate on the second Group III nitride layer; and forming a blocking layer between the heterojunction and the buffer structure, the blocking layer being configured to block charges from entering the buffer structure. 8. The method of claim 7 , wherein forming the buffer structure comprises: forming an intentionally doped Group III nitride layer on the superlattice laminate, wherein the unintentionally doped Group III nitride layer and the superlattice laminate are doped with carbon and have a carbon concentration of at least 10 18 /cm 3 , wherein the blocking layer comprises unintentionally doped Al x Ga (1-x) N, wherein the aluminium content x is greater than an aluminium content of the first Group III nitride layer, wherein the blocking layer is arranged between the first Group III nitride layer and the intentionally doped Group III nitride layer. 9. The method of claim 7 , wherein forming the buffer structure comprises: forming an intentionally doped Group III nitride layer between the superlattice laminate and the unintentionally doped Group III nitride layer, wherein the blocking layer is arranged between the superlattice laminate and the unintentionally doped Group III nitride layer and comprises an intentionally doped Group III nitride having a larger band gap than that of the unintentionally doped Group III nitride layer, wherein the unintentionally doped Group III nitride layer, the intentionally doped Group III nitride blocking layer and the superlattice laminate comprise a carbon dopant and a carbon concentration of at least 10 18 /cm 3 . 10. A method, comprising: forming a buffer structure on a support substrate, the buffer structure comprising an intentionally doped superlattice laminate; forming an unintentionally doped first Group III nitride layer on the buffer structure; forming a second Group III nitride layer on the first Group III nitride layer to form a heterojunction therebetween; and forming a blocking layer between the heterojunction and the buffer structure, the blocking layer being configured to block charges from entering the buffer structure. 11. The method of claim 10 , wherein forming the buffer structure comprises: forming alternate first layers and second layers of the superlattice laminate, wherein the first layers comprise B a1 Al b1 Ga c1 In d1 N material, wherein 0≤a 1 ≤1, 0≤b 1 ≤1, 0≤c 1 ≤1, 0≤d 1 ≤1 and (a 1 +b 1 +c 1 +d 2 )=1, wherein the second layers comprise B a2 Al b2 Ga c2 In d2 N material, wherein 0≤a 2 ≤1, 0≤b 2 ≤1, 0≤c 2 ≤1, 0≤d 2 ≤1 and (a 2 +b 2 +c 2 +d 2 )=1, wherein the band gap of the second layer material is different from that of the first layer material and the superlattice laminate is doped with carbon and comprises a carbon concentration of at least 10 18 /cm 3 . 12. The method of claim 10 , wherein forming the blocking layer comprises: forming unintentionally doped Al x Ga (1-x) N having an aluminium content x greater than an aluminium content of the first Group III nitride layer. 13. The method of claim 12 , wherein the blocking layer is formed between the superlattice laminate and the first Group III nitride layer. 14. The method of claim 12 , wherein the blocking layer is formed between a first sublayer of the first Group III nitride layer and a second sublayer of the first Group III nitride layer, the first sublayer being arranged on the superlattice laminate. 15. The method of claim 10 , wherein forming the buffer structure comprises: forming an intentionally doped Group III nitride layer on the superlattice laminate, wherein the blocking layer is unintentionally doped. 16. The method of claim 15 , wherein the intentionally-doped Group III nitride layer is doped with carbon and has a carbon concentration of at least 10 18 /cm 3 . 17. The method of claim 16 , wherein the blocking layer comprises unintentionally doped Al x Ga (1-x) N having an aluminium content x greater than an aluminium content of the first Group III nitride layer. 18. The method of claim 17 , wherein the blocking layer is arranged between the first Group III nitride layer and the intentionally doped Group III nitride layer. 19. The method of claim 16 , wherein the blocking layer is arranged between a first sublayer of the first Group III nitride layer arranged on the carbon-doped Group III nitride layer and a second sublayer of the first Group III nitride layer. 20. The method of claim 10 , wherein forming the buffer structure comprises: forming an intentionally doped Group III nitride layer between the superlattice laminate and the first Group III nitride layer, wherein the blocking layer comprises an intentionally doped Group III nitride blocking layer having a larger band gap than that of the intentionally doped Group III nitride layer.

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What does patent US10388736B2 cover?
In an embodiment, a method includes forming an intentionally doped superlattice laminate on a support substrate, forming a Group III nitride-based device having a heterojunction on the superlattice laminate layer, and forming a charge blocking layer between the heterojunction and the superlattice laminate.
Who is the assignee on this patent?
Infineon Technologies Austria Ag
What technology area does this patent fall under?
Primary CPC classification H10P14/3216. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 20 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).