Method and apparatus for decoding three-dimensional turbo product code based on crossing layers

Patent metadata

Field	Value
Publication number	US-10382066-B2
Application number	US-201715812061-A
Country	US
Kind code	B2
Filing date	Nov 14, 2017
Priority date	Apr 17, 2017
Publication date	Aug 13, 2019
Grant date	Aug 13, 2019

Abstract

Disclosed is a three-dimensional TPC decoding apparatus. A three-dimensional TPC decoding apparatus includes an X decoder which decodes an X axis of an m-th upper half layer based on decoding results of a Y axis and a Z axis of an m−1-th upper half layer; a Y decoder which decodes a Y axis of an m-th lower half layer based on decoding results of an X axis and a Z axis of an m−1-th lower half layer; and a Z decoder which decodes a Z axis based on a decoding result of the Y axis of an m-th upper half layer and a decoding result of the X axis of an m-th lower half layer.

First claim

What is claimed is:

1. An apparatus for decoding information encoded using a three-dimensional Turbo Product Code (“TPC”), comprising:
an upper X decoder circuit which decodes an X axis value of an m-th upper half layer based on decoding results of a Y axis and a Z axis of an m−1-th upper half layer;
an upper Y decoder circuit that is connected in series with the upper X decoder circuit and which decodes a Y axis value of the m-th upper half based on a decoding result of the upper X decoder circuit;
a lower Y decoder circuit that is connected in parallel with the upper X decoder circuit and which decodes a Y axis value of an m-th lower half layer based on decoding results of the X axis and the Z axis of an m−1-th lower half layer;
a lower X decoder circuit that is connected in series with the lower Y decoder circuit and which decodes an X axis value of the m-th lower half layer based on a decoding result of the lower Y decoder circuit; and
a Z decoder circuit that is connected is series with the upper Y decoder circuit and the lower X decoder circuit, and which decodes a Z axis value based on a decoding result of the upper Y decoder circuit and the a decoding result of the lower X decoder circuit;
wherein the decoding results of the upper X decoder circuit, the lower X decoder circuit, the upper Y decoder circuit, the lower Y decoder circuit, and the Z decoder circuit collectively represent a decoded version of the information.

2. The apparatus according to claim 1 , wherein the lower Y decoder circuit decodes the Y axis value of the m-th lower half while the upper X decoder circuit decodes the X axis value of the m-th upper half layer.

3. The apparatus according to claim 1 , wherein the lower X decoder circuit decodes the X axis value of the m-th lower half while the upper Y decoder circuit decodes the Y axis value of the m-th upper half layer.

4. The apparatus according to claim 1 , wherein decoded values for the X axis and the Y axis are determined using a chase-pyndiah algorithm.

5. The apparatus according to claim 1 , wherein decoded values for the Z axis are determined using a normalized min-sum algorithm.

6. A method for decoding information encoded using a three-dimensional Turbo Product Code (“TPC”), comprising:
decoding, by an upper X decoder circuit, an X axis value of an m-th upper half layer based on decoding results of a Y axis and a Z axis of an m−1-th upper half layer;
decoding, by an upper Y decoder circuit, a Y axis value of the m-th upper half layer based on a decoding result of the upper X decoder circuit;
decoding, by a lower Y decoder circuit, a Y axis value of an m-th lower half layer based on decoding results of the X axis and the Z axis of an m−1-th lower half layer;
decoding, by a lower X decoder circuit, an X axis value of the m-th lower half layer based on the decoding result of the lower Y decoder circuit; and
decoding, by a Z decoder circuit, a Z axis value based on a decoding result of the upper Y decoder circuit and a decoding result of the lower X decoder circuit;
wherein the upper X decoder circuit is connected in series with the upper Y decoder circuit, the upper X decoder circuit is connected in parallel in the lower Y decoder circuit, the lower Y decoder circuit is connected in series with the lower X decoder circuit, and the Z decoder circuit is connected in series with the the upper Y decoder circuit and the lower X decoder circuit; and
wherein the decoding results of the upper X decoder circuit, the lower X decoder circuit, the upper Y decoder circuit, the lower Y decoder circuit, and the Z decoder circuit collectively represent a decoded version of the information.

7. The method according to claim 6 , further comprising:
comparing a predetermined number of iterations for a decoding process with a number of currently performed iterations of the decoding process; and
repeatedly performing the decoding process when the predetermined number is larger than the number of currently performed iterations of the decoding process.

8. The method according to claim 6 , further comprising:
comparing a predetermined number of iterations for a decoding process with a number of currently performed iterations of the decoding process; and
performing hard decision and outputting an information value which searches an error when the predetermined number is equal to the number of currently performed iterations of the decoding process.

Assignees

• Univ Korea Res & Bus Found

Inventors

• Heo Jun
• Ahn Byung Kyu
• Ha Sang Chul

Classifications

• H03M13/2939

  using convolutional codes (H03M13/2957 takes precedence) · CPC title

• H03M13/19

  Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes · CPC title

• H03M13/2963 Primary

  Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes · CPC title

• H03M13/618

  Shortening and extension of codes · CPC title

• H03M13/098

  using single parity bit · CPC title