Power amplifier linearization system and method

Patent metadata

Field	Value
Publication number	US-10381985-B2
Application number	US-201816127688-A
Country	US
Kind code	B2
Filing date	Sep 11, 2018
Priority date	Sep 30, 2015
Publication date	Aug 13, 2019
Grant date	Aug 13, 2019

Abstract

Envelope tracking can be employed to reduce power consumption of a power amplifier, but envelope tracking can introduce nonlinearities to a power amplifier. These nonlinearities can manifest themselves as noise at the output of the power amplifier. Embodiments described herein provide techniques for characterizing a parameter indicative of power amplifier noise when envelope tracking is employed. Measurement of this parameter can permit power amplifier designers to decide whether to forgo envelope tracking if a power amplifier is too susceptible to such noise, redesign the power amplifier to improve compatibility with envelope tracking, or to employ distortion compensation circuitry to reduce the noise output by the power amplifier. Counterintuitively, this distortion compensation circuitry may involve increasing the power, such as the envelope tracking power supply. However, increasing the power may be a desirable trade-off for increased linearity.

First claim

What is claimed is:

1. An envelope tracker characterization method comprising:
providing a first input signal to a power amplifier;
providing a second input signal to an envelope tracker circuit that generates a supply voltage signal for the power amplifier by tracking an envelope of the second input signal;
measuring intermodulation distortion at the output of the power amplifier;
calculating an intermodulation distortion phase angle based on the measured intermodulation distortion and the amount of delay, the intermodulation distortion phase angle indicative of linearity of the power amplifier; and
comparing the intermodulation distortion phase angle with a threshold to analyze suitability of the power amplifier for use with the envelope tracker.

2. The method of claim 1 wherein the first input signal is a two-tone signal and the second input signal is a single tone signal.

3. The method of claim 1 further comprising delaying the second input signal or the supply voltage signal by an adjustable amount of delay.

4. The method of claim 3 wherein said delaying the second input signal further includes delaying the second input signal until the intermodulation distortion reaches a first minimum.

5. The method of claim 4 further comprising delaying the second input signal to the second delay amount until the intermodulation distortion reaches a second minimum.

6. The method of claim 3 wherein said calculating the intermodulation distortion phase angle is further based on halving a phase difference between the first delay amount and the second delay amount.

7. The method of claim 3 further comprising calculating a second delay value based on the intermodulation distortion phase angle to use in a distortion compensation circuit with the power amplifier.

8. The method of claim 1 further comprising calculating a gain value based on the intermodulation distortion phase angle to use as a distortion compensation circuit with the power amplifier.

9. A power amplifier system comprising:
a power amplifier having a signal input path and a power input path;
an envelope tracker configured to provide a power supply voltage to the power amplifier through the power input path; and
a distortion compensation circuit disposed in the signal input path of the power amplifier, the distortion circuit including a gain circuit having a gain value selected based on an intermodulation phase angle, the gain circuit configured to compensate for intermodulation distortion associated with the intermodulation phase angle, the intermodulation distortion due to the power amplifier mixing the power supply voltage with an input to the power amplifier.

10. The power amplifier system of claim 9 wherein the gain circuit is in the power input path.

11. The power amplifier system of claim 9 wherein the gain circuit is in the signal input path.

12. The power amplifier system of claim 9 wherein the distortion compensation circuit further includes a delay circuit having a delay based upon the intermodulation phase angle.

13. The power amplifier system of claim 12 wherein the delay circuit is in the power input path.

14. The power amplifier system of claim 12 wherein the delay circuit is in the signal input path.

15. A wireless device comprising:
a transceiver configured to generate a radio frequency signal and an envelope of the radio frequency signal;
a power amplifier configured to amplify the radio frequency signal;
an envelope tracker configured to generate a power supply voltage based on the envelope signal and provide the power supply voltage to the power amplifier; and
a distortion compensation circuit including a gain circuit having a gain value based on an intermodulation phase angle, the gain circuit configured to compensate for intermodulation distortion associated with the intermodulation phase angle, the intermodulation distortion due to the power amplifier mixing the power supply voltage with the radio frequency signal.

16. The wireless device of claim 15 wherein the gain circuit is in a power input path of the power amplifier.

17. The wireless device of claim 15 wherein the gain circuit is in a signal input path of the power amplifier.

18. The wireless device of claim 15 wherein the distortion compensation circuit further includes a delay circuit having a delay based upon the intermodulation phase angle.

19. The power amplifier system of claim 18 wherein the delay circuit is in a power input path of the power amplifier.

20. The power amplifier system of claim 18 wherein the delay circuit is in a signal input path of the power amplifier.

Assignees

• Skyworks Solutions Inc

Inventors

• Zhu Yu
• Klimashov Oleksiy
• Bartle Dylan C
• Dicarlo Paul T

Classifications

• H04B2001/0441

  with linearisation using feed-forward · CPC title

• H03F1/3241

  using predistortion circuits (H03F1/3211, H03F1/3217 take precedence) · CPC title

• H03F1/0222

  by using a signal derived from the input signal · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F3/24

  of transmitter output stages · CPC title