Bendable display panel and display device

US10380938B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10380938-B2
Application numberUS-201815866230-A
CountryUS
Kind codeB2
Filing dateJan 9, 2018
Priority dateSep 4, 2017
Publication dateAug 13, 2019
Grant dateAug 13, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present disclosure provide a display panel and a display device to improve brightness difference between bending position and non-bending position of the display panel. The display panel includes an array substrate including a display area, the display area includes a non-bendable first display area in which a first driving transistor is arranged; a bendable second display area in which a second driving transistor is arranged, a width-length ratio of the first driving transistor being greater than that of the second driving transistor; a first organic light emitting diode arranged in the first display area and including an anode and a cathode, the anode being coupled to the first driving transistor; and a second organic light emitting diode arranged in the second display area and including an anode and a cathode, the anode of the second organic light emitting diode being coupled to the second driving transistor.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: an array substrate having a display area and a non-display area surrounding the display area, wherein the display area comprises: a first display area being non-bendable; a second display area being bendable; a plurality of first pixel diving circuits, each including a plurality of first driving transistors, arranged in the first display area; and a plurality of second pixel diving circuits, each including a plurality of second driving transistors, arranged in the second display area; wherein a first width-length ratio of each of the plurality of first driving transistors is greater than a second width-length ratio of each of the plurality of second driving transistors; wherein a plurality of first organic light emitting diodes each corresponding to a respective first pixel driving circuit of the plurality of first pixel driving circuits is arranged in the first display area, wherein each of the plurality of first organic light emitting diodes comprises an anode and a cathode, wherein the anode is coupled to the plurality of first driving transistors in a respective first pixel driving circuit; wherein a plurality of second organic light emitting diodes each corresponding to a respective second pixel driving circuit of the plurality of second pixel driving circuits is arranged in the second display area, wherein each of the plurality of second organic light emitting diodes comprises an anode and a cathode, wherein the anode of the second organic light emitting diode is coupled to the plurality of second driving transistors in a respective second pixel driving circuit; wherein a difference between the first width-length ratio and the second width-length ratio is j, and a ratio of j to the first width-length ratio is k, and wherein k is smaller than 70%. 2. The display panel according to claim 1 , wherein a number of the transistors of the plurality of first driving transistors in one of the first pixel driving circuits is the same as a number of the transistors of the plurality of second driving transistors in one of the second pixel driving circuits. 3. The display panel according to claim 1 , wherein the first display area comprises a plurality of first pixel driving circuits, wherein each of the plurality of first pixel driving circuits includes one of the plurality of first driving transistors; wherein the second display area comprises a plurality of second pixel driving circuits, wherein each of the plurality of second pixel driving circuits includes one of the plurality of second driving transistors; and wherein a number of transistors of the plurality of first driving transistors in one of the first pixel driving circuits is different from a number of transistors of the plurality of second driving transistors in one of the second pixel driving circuits. 4. The display panel according to claim 3 , wherein the number of transistors of the plurality of first driving transistors in one of the first driving circuits is greater than the number of transistors of the plurality of second driving transistors in one of the second driving circuits. 5. The display panel according to claim 4 , wherein each of the plurality of first pixel driving circuits comprises six transistors of the plurality of second driving transistors and one capacitor; and wherein each of the plurality of second pixel driving circuits comprises five transistors of the plurality of second driving transistors and one capacitor. 6. The display panel according to claim 4 , wherein each of the plurality of first pixel driving circuits comprises of six transistors of the plurality of first driving transistors and one capacitor; and wherein each of the plurality of second pixel driving circuits comprises of two transistors of the plurality of second driving transistors and one capacitor. 7. The display panel according to claim 4 , further comprising: a first pixel driving chip electrically connected to the plurality of first pixel driving circuits and the plurality of second pixel driving circuits. 8. The display panel according to claim 4 , further comprising: a first pixel driving chip electrically connected to the plurality of first pixel driving circuits; and a second pixel driving chip electrically connected to the plurality of second pixel driving circuits. 9. The display panel according to claim 1 , wherein the display panel is a flexible display panel. 10. The display panel according to claim 9 , wherein when the second display area is bent, the first display area and the second display area are not aligned in a same plane. 11. The display panel according to claim 1 , wherein the display panel comprises a plurality of the first display areas and a plurality of the second display areas. 12. The display panel according to claim 1 , wherein the first display area and the second display area each is stripe-shaped. 13. The display panel according to claim 12 , wherein the first display area comprises a plurality of first display sub-areas, and the second display area comprises a plurality of second display sub-areas; and wherein the plurality of first display sub-areas and the plurality of second display sub-areas are alternately arranged. 14. The display panel according to claim 1 , wherein the array substrate further comprises: a third display area, wherein a third driving transistor is arranged in the third display area, wherein the second width-length ratio of the second driving transistor is greater than a width-length ratio of the third driving transistor. 15. A display device, comprising: a display panel, wherein the display panel comprises: an array substrate having a display area and a non-display area surrounding the display area, wherein the display area comprises: a first display area being non-bendable; a second display area being bendable; a plurality of first pixel diving circuits, each including a plurality of first driving transistors, arranged in the first display area; and a plurality of second pixel diving circuits, each including a plurality of second driving transistors, arranged in the second display area; wherein a first width-length ratio of each of the plurality of first driving transistors is greater than a second width-length ratio of each of the plurality of second driving transistors; wherein a plurality of first organic light emitting diodes each corresponding to a respective first pixel driving circuit of the plurality of first pixel driving circuits is arranged in the first display area, wherein each of the plurality of first organic light emitting diodes comprises an anode and a cathode, wherein the anode is coupled to the plurality of first driving transistors in a respective first pixel driving circuit; wherein a plurality of second organic light emitting diodes each corresponding to a respective second pixel driving circuit of the plurality of second pixel driving circuits is arranged in the second display area, wherein each of the plurality of second organic light emitting diodes comprises an anode and a cathode, wherein the anode of the second organic light emitting diode is coupled to the plurality of second driving transistors in a respective second pixel driving circuit; wherein a difference between the first width-length ratio and the second width-length ratio is j, and a ratio of j to the first width-length ratio is k, and wherein k is smaller than 70%.

Assignees

Inventors

Classifications

  • G09G3/3208Primary

    organic, e.g. using organic light-emitting diodes [OLED] · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

  • Improving the luminance or brightness uniformity across the screen · CPC title

  • The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

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What does patent US10380938B2 cover?
Embodiments of the present disclosure provide a display panel and a display device to improve brightness difference between bending position and non-bending position of the display panel. The display panel includes an array substrate including a display area, the display area includes a non-bendable first display area in which a first driving transistor is arranged; a bendable second display ar…
Who is the assignee on this patent?
Shanghai Tianma Am Oled Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3208. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 13 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).