Preventing software component timer processing issues

US10379928B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10379928-B2
Application numberUS-201715635362-A
CountryUS
Kind codeB2
Filing dateJun 28, 2017
Priority dateJun 28, 2017
Publication dateAug 13, 2019
Grant dateAug 13, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

Method and system are provided for preventing local processing problems interfering with a time-sensitive validation process. The method monitors an elapsed time of an instance of a time-sensitive validation process of a software component including dispatching of the process instance and determines if the elapsed time is significantly greater than a preset processing time. If so, the method may dynamically alter error processing of the time-sensitive validation process of the software component.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method for preventing local processing problems interfering with a time-sensitive validation process comprising: monitoring an elapsed time of a process instance of a time-sensitive validation process of a software component including dispatching of the process instance and determining if the elapsed time is greater than a preset processing time, wherein the time-sensitive validation process includes a request and response communication with an external system; and dynamically altering error processing of the time-sensitive validation process of the software component. 2. The method of claim 1 , further comprising: determining that a signal has been received in the preset processing time indicating that the time-sensitive validation process has executed correctly; and exiting the time-sensitive validation process. 3. The method of claim 1 , further comprising: in response to determining that the elapsed time is not greater than the preset processing time and a signal has not been received in the preset processing time indicating that the time-sensitive validation process has executed correctly, initiating a normal error processing logic for the time-sensitive validation process. 4. The method of claim 1 , wherein monitoring the elapsed time records a start time prior to initiating the instance of a time-sensitive validation process and records an end time when prompted by the end of the preset processing time of the time-sensitive validation process. 5. The method of claim 1 , further comprising: determining that the elapsed time is greater than a preset processing time; and applying an adjustment factor to the elapsed time, wherein the adjustment factor is configured for a particular time-sensitive validation process. 6. The method of claim 1 , wherein dynamically altering error processing of the time-sensitive validation process of the software component includes determining from an operating system dispatching component processor usage or dispatching statistics to determine that there is a local dispatch problem. 7. The method of claim 1 , wherein the method repeats the monitoring of another instance of the time-sensitive validation process to determine if this is a temporary condition or a permanent condition. 8. The method of claim 7 , wherein repeating instances of the time-sensitive validation process continues until the elapsed time is close to the preset processing time. 9. The method of claim 1 , wherein the time-sensitive validation process is a heartbeat process which is used to validate a connection status between interconnected software components by the sending and receiving of a portion of data. 10. A system for preventing local processing problems interfering with a time-sensitive validation process comprising: a processor and a memory configured to provide computer program instructions to the processor to execute the function of the following component; an elapsed time monitoring component for monitoring an elapsed time of an instance of a time-sensitive validation process of a software component including dispatching of the process instance, wherein the time-sensitive validation process includes a request and response communication with an external system; a threshold component for determining that the elapsed time is greater than a preset processing time; and an error processing component for dynamically altering error processing of the time-sensitive validation process of the software component. 11. The system of claim 10 , including a signal receiving component for determining that a signal has been received in the preset processing time indicating that the time-sensitive validation process has executed correctly, and exiting the time-sensitive validation process. 12. The system of claim 11 , wherein the threshold component determines that the elapsed time is not greater than the preset processing time and the signal receiving component determines that a signal has not been received in the preset processing time indicating that the time-sensitive validation process has executed correctly, and the error processing component initiates normal error processing logic for the time-sensitive validation process. 13. The system of claim 10 , wherein the elapsed time monitoring component monitoring the elapsed time records a start time prior to initiating the instance of a time-sensitive validation process and records an end time when prompted by the end of the preset processing time of the time-sensitive validation process. 14. The system of claim 10 , wherein the threshold component applies an adjustment factor to the elapsed time, wherein the adjustment factor is configured for a particular time-sensitive validation process. 15. The system of claim 10 , wherein the error processing component determines from an operating system dispatching component processor usage or dispatching statistics to determine that there is a local dispatch problem. 16. The system of claim 10 , including a repeat component for repeating the monitoring of another instance of the time-sensitive validation process to determine that this is a temporary condition or a permanent condition. 17. The system of claim 16 , wherein the repeat component repeats instances of the time-sensitive validation process until the elapsed time is close to the preset processing time. 18. A computer program product for preventing local processing problems interfering with a time-sensitive validation process, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to: monitor an elapsed time of an instance of a time-sensitive validation process of a software component including dispatching of the process instance and determine if the elapsed time is greater than a preset processing time, wherein the time-sensitive validation process includes a request and response communication with an external system, and, if so, dynamically alter error processing of the time-sensitive validation process of the software component.

Assignees

Inventors

Classifications

  • where the computing system component is a software system · CPC title

  • by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title

  • Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

  • for systems · CPC title

  • the processing taking place on a specific hardware platform or in a specific software environment · CPC title

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What does patent US10379928B2 cover?
Method and system are provided for preventing local processing problems interfering with a time-sensitive validation process. The method monitors an elapsed time of an instance of a time-sensitive validation process of a software component including dispatching of the process instance and determines if the elapsed time is significantly greater than a preset processing time. If so, the method ma…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F11/0757. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 13 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).