Systems and methods for dynamically switching memory performance states
US-2018074743-A1 · Mar 15, 2018 · US
US10375349B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10375349-B2 |
| Application number | US-201715851524-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 21, 2017 |
| Priority date | Jan 3, 2017 |
| Publication date | Aug 6, 2019 |
| Grant date | Aug 6, 2019 |
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Bandwidth management includes receiving, by a branch device, a requested display identification data structure from a display device. The branch device modifies the requested display identification data structure based on a total bandwidth through a constricted port on the branch device to obtain a modified display identification data structure. The branch device transmits the modified display identification data structure to a source device.
Opening claim text (preview).
What is claimed is: 1. A branch device for bandwidth management, the branch device comprising: a source device port; a first display device port; processing circuitry coupled to the source device port and the display device port, the processing circuitry configured to: receive, via the first display device port, a first requested display identification data structure from a first display device, modify the first requested display identification data structure based on a total bandwidth through a constricted port on the branch device to obtain a modified display identification data structure, and transmit the modified display identification data structure to the source device via the source device port; and a video stream processing architecture coupled to the source device port and the first display device port, the video stream processing architecture configured to: receive, via the source device port, an original video stream, wherein the original video stream is modified, as defined by the modified display identification structure, in comparison to a requested video stream as defined by the first requested display identification data structure, modify the original video stream to create the requested video stream matching the first requested display identification data structure, and transmit the requested video stream via the first display device port. 2. The branch device of claim 1 , wherein the constricted port is the source device port. 3. The branch device of claim 2 , further comprising: a second display device port coupled to the processing circuitry, wherein the processing circuitry is further configured to: aggregate, to obtain the total bandwidth, the first requested display identification data structure and a second requested display identification data structure, the second requested display identification data structure received through the second display device port from a second display device, wherein the first requested display identification data structure is modified based on the total bandwidth exceeding capacity of the source device port. 4. The branch device of claim 1 , wherein the constricted port is the first display device port. 5. The branch device of claim 4 , wherein the branch device is coupled to a plurality of source devices, wherein the source device is in the plurality of source devices, and wherein each of the plurality of source devices provides a portion of a display on the first display device through the first display device port. 6. The branch device of claim 1 , wherein the processing circuitry is further configured to: configure the video stream processing architecture according to the original display identification data structure and the modified display identification data structure. 7. The branch device of claim 1 , wherein the video stream processing architecture is further configured to: transform the original video stream on the source device port to a pixel version, wherein the pixel version is modified to create the requested video stream. 8. The branch device of claim 1 , wherein the video stream processing architecture comprises: a phase-locked loop (PLL), and a video clock frequency modification unit coupled to the PLL and configured to tune the PLL to a clock frequency matching the requested display identification data structure to obtain a tuned PLL, wherein the tuned PLL is applied to the original video stream according to the clock frequency to create the requested video stream. 9. The branch device of claim 1 , further comprising: a video timing transformation unit configured to: modify a video timing of the original video stream to match the requested display identification data structure and create the requested video stream. 10. The branch device of claim 1 , wherein the modified display identification data structure has a smaller horizontal blanking period and lower clock frequency than the requested display identification data structure, and wherein the video stream processing architecture is configured to increase the horizontal blanking period and the clock frequency in the original video stream to create the requested video stream. 11. The branch device of claim 1 , wherein the modified display identification data structure has a lower clock frequency than the requested display identification data structure, and wherein the video stream processing architecture is configured to increase the clock frequency in the original video stream to create the requested video stream. 12. The branch device of claim 1 , wherein the first display device port complies with at least one selected from a group consisting of DisplayPort Interface, High-Definition Multimedia Interface (HDMI), Mobile Industry Processor Interface (MIPI), and Digital Visual Interface (DVI). 13. The branch device of claim 1 , wherein the first requested display identification data structure is an extended display identification data (EDID). 14. A method for bandwidth management, the method comprising: receiving, by a branch device, a first requested display identification data structure from a first display device; modifying, by the branch device, the first requested display identification data structure based on a total bandwidth through a constricted port on the branch device to obtain a modified display identification data structure; transmitting, by the branch device, the modified display identification data structure to a source device; receiving, via the source device port, an original video stream, wherein the original video stream is modified, as defined by the modified display identification structure, in comparison to a requested video stream as defined by the first requested display identification data structure; modifying the original video stream to create the requested video stream matching the first requested display identification data structure; and transmitting the requested video stream via the first display device port. 15. The method of claim 14 , further comprising: aggregating, to obtain the total bandwidth, the first requested display identification data structure and a second requested display identification data structure, the second requested display identification data structure received from a second display device, wherein the first requested display identification data structure is modified based on the total bandwidth exceeding capacity of a source device port connected to the source device. 16. The method of claim 14 , further comprising: transforming the original video stream on the source device port to a pixel version, wherein the pixel version is modified to create the requested video stream. 17. The method of claim 14 , further comprising: modifying a video timing of the original video stream to match the requested display identification data structure and create the requested video stream. 18. A video stream processing architecture coupled to a source device port and a display device port, the video stream processing architecture comprising circuitry for: receiving, via the source device port from a source device, an original video stream, wherein the original video stream is modified, as defined by a modified display identification structure, in comparison to a requested video stream as defined by a requested display identification data structure, and wherein the modified display identification structure is obtained by modifying the requested display identification data structure received from a display device via the display device port
Change or adaptation of the frame rate of the video stream · CPC title
for rate control {, e.g. request to the server to modify its transmission rate (flow control in packet networks H04L47/10)} · CPC title
for monitor identification · CPC title
Synchronising (for television systems using pulse code modulation H04N7/56) · CPC title
Solving problems of bandwidth in display systems · CPC title
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