FIR filter circuit design method using approximate computing

Patent metadata

Field	Value
Publication number	US-10374580-B2
Application number	US-201815883104-A
Country	US
Kind code	B2
Filing date	Jan 30, 2018
Priority date	Feb 6, 2017
Publication date	Aug 6, 2019
Grant date	Aug 6, 2019

Abstract

A finite impulse response (FIR) filter circuit design method using approximate computing, the FIR filter circuit design method including: replacing adders of the FIR filter with approximate adders; and performing a synthesis work according to a set approximate synthesis flow when the replacing of the adders of the FIR filter are replaced with the approximate adders is performed, wherein, in the approximate synthesis flow, a numeric column of each of the approximate adders is divided into an accurate part and an inaccurate part, and a numeric column of the inaccurate part is approximated. In the FIR filter, conventional adders/subtractors are replaced with addition/subtraction having an automated synthesis flow so that energy consumption can be reduced.

First claim

What is claimed is:

1. A finite impulse response (FIR) filter circuit design method using approximate computing, the FIR filter circuit design method comprising:
replacing adders of a FIR filter with approximate adders; and
performing a synthesis work according to a set approximate synthesis flow when the replacing of the adders of the FIR filter are replaced with the approximate adders is performed,
wherein, in the set approximate synthesis flow, the approximate adders are divided into an accurate part and an inaccurate part, and the inaccurate part is approximated,
wherein the synthesis work according to the set approximate synthesis flow comprises:
classifying adders;
initializing a number of approximate bits of the classified adders;
synthesizing the adders to calculate sensitivity and accuracy;
comparing designs of the FIR filter to one another through calculation of sensitivity and accuracy, and designating iteration of a design having largest sensitivity as a seed of a next iteration; and
comparing the sensitivity with a set value and determining an updated sensitivity.

2. The FIR filter circuit design method of claim 1 , wherein, in the set approximate synthesis flow, the accuracy is defined by Equation 1:

accuracy
=

min

k
=
1

,

⁢
…
⁢

,
M

⁢

(

1
-



result
k

-

ref
k





ref
k



)

×
100
⁢
%

,

(
1
)

where result k is an approximate result generated from a k-th input pattern, and ref k is a correct result.

3. The FIR filter circuit design method of claim 1 , wherein, in the set approximate synthesis flow, the sensitivity is defined by a sensitivity factor (SF) which is defined by Equation 2:

S
⁢

⁢
F

=

{

accuracy
-

accuracy
min

delay

,

if
⁢

⁢
accuracy

>

accuracy
min

0
,

else

.

(
2
)

4. The FIR filter circuit design method of claim 1 , wherein, in the set approximate synthesis flow, to verify an output quality of a processed image, peak signal-to-noise-ratio (PSNR) is defined by Equation 3:

PSNR
=

10
×

log
⁡

(

255
2

σ
noise
2

)

,

(
3
)

Assignees

• Ulsan Nat Inst Science & Tech Unist
• Unist Uslan National Institute Of Science And Tech

Inventors

• Kang Seokhyeong
• Kang Yesung

Classifications

• H03H2017/0081

  of FIR filters · CPC title

• H03H21/0043

  Adaptive algorithms · CPC title

• H03H17/0621 Primary

  with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing · CPC title

• H03H17/06

  Non-recursive filters · CPC title

• H03H17/0223 Primary

  Computation saving measures; Accelerating measures (computations per se G06F) · CPC title