Refresh rate adjust

US10373667B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10373667-B2
Application numberUS-201314913872-A
CountryUS
Kind codeB2
Filing dateAug 28, 2013
Priority dateAug 28, 2013
Publication dateAug 6, 2019
Grant dateAug 6, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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A technique includes determining that a row of memory has been activated at a threshold rate. Upon reaching the threshold rate, a refresh rate for the row of memory and an adjacent row of memory may be increased. Subsequent to the increase, the refresh rate may be returned to a default rate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: determining, by a memory controller, that a row of memory has been activated at a threshold rate of activation, wherein the threshold rate of activation is less than a rate of activation at which other rows of the memory are impacted; detecting aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that receive a predetermined number of activations within a period of time; increasing, by the memory controller and in response to the detecting aggressor rows, a refresh rate for a region which contains the row of memory and an adjacent row of memory; delaying, by the memory controller and to implement hysteresis, a decrease in the refresh rate for the region which contains the row of memory and the adjacent row of memory for a period of time; and decreasing, by the memory controller, the refresh rate for the region which contains the row of memory and the adjacent row of memory based on a predetermined operating characteristic for decreasing the refresh rate for the region subsequent to the increase. 2. The method of claim 1 , wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory based on the predetermined operating characteristic for decreasing the refresh rate for the region comprises decreasing the refresh rate for the region based on an expiration of a period of time. 3. The method of claim 1 , further comprising: monitoring, via the memory controller, the row of memory after increasing the refresh rate for the region to determine whether the row of memory is continually being activated at the threshold rate of activation; and wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory based on the predetermined operating characteristic for decreasing the refresh rate for the region comprises decreasing the refresh rate for the region based on the monitoring indicating the row of memory is not being activated at the threshold rate of activation. 4. The method of claim 3 , wherein the delaying the decreasing for a period of time is in response to the monitoring indicating the row of memory is not being activated at the threshold rate of activation. 5. The method of claim 1 , wherein increasing the refresh rate for the region comprises increasing the refresh rate for the region by a factor of two. 6. The method of claim 1 , wherein increasing the refresh rate for the region which contains the row of memory and an adjacent row of memory comprises increasing a refresh rate for a device comprising the row of memory and the adjacent row of memory. 7. The method of claim 1 , wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory comprises returning the refresh rate for the region to a default refresh rate. 8. A method comprising: monitoring, by a computing device, an activated rate of a row of memory in a memory device; determining, by the computing device, that the activation rate of the row of memory is approaching a rate of activation at which other rows of the memory are impacted; detecting aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that receive a predetermined number of activations within a period of time; adjusting, by the computing device and in response to the detecting aggressor rows, a refresh rate for the row of memory and an adjacent row of memory until the activation rate of the row of memory decreases; and delaying a decrease in the refresh rate for the row of memory and an adjacent row of memory for a period of time. 9. The method of claim 8 , wherein determining that the activated rate of the row of memory is approaching the rate of activation at which other rows of the memory are impacted comprises determining that an activate count has reached a predetermined threshold of activation in a period of time. 10. The method of claim 8 , wherein adjusting the refresh rate for the row of memory and the adjacent row of memory comprises increasing a refresh rate for a region including the row of memory and the adjacent row of memory by a preset factor until the activated rate of the row of memory decreases to a predetermined threshold of activation. 11. The method of claim 8 , wherein adjusting the refresh rate for the row of memory and the adjacent row of memory comprises adjusting a refresh rate for a region of the memory device including the row of memory. 12. The method of claim 8 , wherein adjusting the refresh rate for a region which contains the row of memory and the adjacent row of memory comprises adjusting the refresh rate for the region for a period of time after the activated rate of the row of memory decreases. 13. A system comprising: a memory device; and a memory controller coupled to the memory device, the memory controller to: detect aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that are determined to receive a predetermined number of activations within a period of time; adjust, and in response to the detecting aggressor rows, a refresh rate of a row of memory and an adjacent row of memory for a period of time in response to a determination that an activated rate of the row of memory approaches a rate of activation at which other rows of the memory are impacted. 14. The system of claim 13 , wherein the period of time is determined based upon a length of time the activated rate of the row of memory remains above a threshold rate of activation after approaching the rate of activation at which other rows of the memory are impacted. 15. The system of claim 13 , wherein the memory controller is to increase the refresh rate of the row of memory and the adjacent row of memory until the activated rate of the row of memory decreases below a threshold rate of activation for a period of time.

Assignees

Inventors

Classifications

  • Address translation · CPC title

  • Configuration or reconfiguration of storage systems · CPC title

  • Calibration or ate or cycle tuning · CPC title

  • Single storage device · CPC title

  • G11C11/406Primary

    Management or control of the refreshing or charge-regeneration cycles · CPC title

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What does patent US10373667B2 cover?
A technique includes determining that a row of memory has been activated at a threshold rate. Upon reaching the threshold rate, a refresh rate for the row of memory and an adjacent row of memory may be increased. Subsequent to the increase, the refresh rate may be returned to a default rate.
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G11C11/406. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 06 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).