Electronic timepiece with internal antenna
US-9219304-B2 · Dec 22, 2015 · US
US10372087B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10372087-B2 |
| Application number | US-201615388693-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 22, 2016 |
| Priority date | Mar 16, 2016 |
| Publication date | Aug 6, 2019 |
| Grant date | Aug 6, 2019 |
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A satellite radio wave receiving device includes: a receiver that receives a satellite radio wave to identify a reception signal; and a processor that acquires primary date and time information from the identified reception signal and outputs a date and time notifying signal indicating date and time based on the primary date and time information to an outside of the satellite radio wave receiving device. The date and time notifying signal includes at least a timing notifying signal indicating a predetermined timing. The processor determines the predetermined timing without consideration of a timing of a second synchronization point which is a leading edge of every second in the date and time based on the primary date and time information, and outputs the timing notifying signal at the predetermined timing.
Opening claim text (preview).
What is claimed is: 1. A radio controlled timepiece comprising: a time counting circuit configured to count date and time; a satellite radio wave receiving device comprising: a receiver configured to receive satellite radio waves; and a first processor configured to: acquire primary date and time information, for correcting the date and time counted by the time counting circuit, from the satellite radio waves received; in response to completion of acquisition of the primary date and time information from the satellite radio waves received: set an output timing for outputting a timing notifying signal, the output timing being set to be a predetermined delay from a time of the completion of acquisition of the primary date and time information, irrespective of synchronization with seconds indicated by the primary date and time information; output the timing notifying signal at the output timing; determine date and time of outputting the timing notifying signal based on the primary date and time information; and output a set date and time signal indicating the date and time of outputting the timing notifying signal; and a second processor configured to: detect the timing notifying signal output from the first processor; count elapsed time from detection of the timing notifying signal; detect the set date and time signal and acquire the date and time of outputting the timing notifying signal indicated by the set date and time signal detected; and correct the date and time counted by the time counting circuit based on the elapsed time counted and the date and time of outputting the timing notifying signal. 2. The radio controlled timepiece according to claim 1 , comprising: a thermal sensor configured to measure an operating temperature related to a counting operation of the time counting circuit, wherein the second processor is configured to: calculate a maximum error assumed to be contained in the date and time counted by the time counting circuit based on elapsed time from a latest correction of the date and time counted by the time counting circuit and a measured value of the operating temperature measured by the thermal sensor; and output an instruction signal to the first processor of the satellite radio wave receiving device to acquire the primary date and time information, wherein the instruction signal indicates the maximum error, and wherein first processor of the satellite radio wave receiving device is configured to acquire, as the primary date and time information, date and time information capable of correcting the date and time within the maximum error. 3. The radio controlled timepiece according to claim 2 , comprising: wherein the second processor is configured to: retrieve, from a storage, historical information of the operating temperature measured by the thermal sensor from a time when the date and time counted by the time counting circuit is lastly corrected to a time when the satellite radio wave receiving device is instructed by the instruction signal to acquire the primary date and time information; and calculate the maximum error based on the historical information. 4. The radio controlled timepiece according to claim 1 , wherein the first processor of the satellite radio wave receiving device is configured to: identify a reception signal from the satellite radio waves received, wherein the reception signal includes an arrangement of plural codes, the arrangement containing a parity-check code for each code block composed of a predetermined number of the codes; and perform a comparison of parity data obtained from the codes of the code block with the parity-check code contained in the code block; and acquire the primary date and time information based on a result of the comparison. 5. The radio controlled timepiece according to claim 4 , wherein a time required for transmitting the code block is less than 1 second, and wherein the first processor of the satellite radio wave receiving device is configured to set the output timing for outputting the timing notifying signal at a transmission timing of a leading edge of a first code block after the completion of acquisition of the primary date and time information. 6. The radio controlled timepiece according to claim 5 , further comprising: a thermal sensor configured to measure an operating temperature related to a counting operation of the time counting circuit, wherein the second processor is configured to: calculate a maximum error assumed to be contained in the date and time counted by the time counting circuit based on elapsed time from a latest correction of the date and time counted by the time counting circuit and a measured value of the operating temperature measured by the thermal sensor; and output an instruction signal to the first processor of the satellite radio wave receiving device to acquire the primary date and time information, wherein the instruction signal indicates the maximum error, and wherein first processor of the satellite radio wave receiving device is configured to acquire, as the primary date and time information, date and time information capable of correcting the date and time within the maximum error. 7. The radio controlled timepiece according to claim 6 , wherein the second processor is configured to: retrieve, from a storage, historical information of the operating temperature measured by the thermal sensor from a time when the date and time counted by the time counting circuit is lastly corrected to a time when the satellite radio wave receiving device is instructed by the instruction signal to acquire the primary date and time information; and calculate the maximum error based on the historical information. 8. The radio controlled timepiece according to claim 4 , comprising: a thermal sensor configured to measure an operating temperature related to a counting operation of the time counting circuit, wherein the second processor is configured to: calculate a maximum error assumed to be contained in the date and time counted by the time counting circuit based on elapsed time from a latest correction of the date and time counted by the time counting circuit and a measured value of the operating temperature measured by the thermal sensor; and output an instruction signal to the first processor of the satellite radio wave receiving device to acquire the primary date and time information, wherein the instruction signal indicates the maximum error, and wherein first processor of the satellite radio wave receiving device is configured to acquire, as the primary date and time information, date and time information capable of correcting the date and time within the maximum error. 9. The radio controlled timepiece according to claim 8 , wherein the second processor is configured to: retrieve, from a storage, historical information of the operating temperature measured by the thermal sensor from a time when the date and time counted by the time counting circuit is lastly corrected to a time when the satellite radio wave receiving device is instructed by the instruction signal to acquire the primary date and time information; and calculate the maximum error based on the historical information. 10. The radio controlled timepiece according to claim 1 , wherein the second processor is configured to control a display to display the date and time counted by the time counting circuit that has been corrected based on the elapsed time counted and the date and time of outputting the timing notifying signal. 11. A method a radio controlled timepiece comprising: a time counting circuit; a satellite radio wave receiving device comprising:
Tuning or receiving; Circuits therefor · CPC title
Producing timing pulses (driving circuits for stepping motors G04C3/14; producing preselected time intervals for use as timing standards G04F5/00; pulse technique in general H03K; control, synchronisation, or stabilisation of generators in general H03L) · CPC title
the time-piece preparing itself on set times on the reception of the sychronising signal · CPC title
by radio (time setting brought into action by radio G04C9/02) · CPC title
Decoding time data; Circuits therefor · CPC title
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