Variable gain distributed amplifier systems and methods

US10367463B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10367463-B2
Application numberUS-201615177459-A
CountryUS
Kind codeB2
Filing dateJun 9, 2016
Priority dateJun 9, 2016
Publication dateJul 30, 2019
Grant dateJul 30, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line. The first set of discrete gain settings has approximately constant logarithmic spacing.

First claim

Opening claim text (preview).

What is claimed is: 1. A distributed amplifier system comprising first stage traveling wave amplifier (TWA) circuitry controllable to provide one of a first set of discrete gain settings, the first stage TWA circuitry comprising: a first input transmission line; a first output transmission line; and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line, wherein the first set of discrete gain settings has approximately constant logarithmic spacing. 2. The distributed amplifier system of claim 1 , wherein each of the first plurality of amplifiers is configured to independently switch between an ON state and an OFF state by a first plurality of binary control signals. 3. The distributed amplifier system of claim 2 , wherein: the distributed amplifier system further comprises second stage TWA circuitry coupled in series with the first stage TWA circuitry; the second stage TWA circuitry is controllable to provide one of a second set of discrete gain settings; the second set of discrete gain settings has approximately constant logarithmic spacing; and the second stage TWA circuitry comprises: a second input transmission line; a second output transmission line; and a second plurality of amplifiers coupled antiparallel between the second input transmission line and the second output transmission line, wherein each of the second plurality of amplifiers is configured to independently switch between an ON state and an OFF state by a second plurality of binary control signals. 4. The distributed amplifier system of claim 3 , wherein level shifting circuitry is DC coupled between the first output transmission line and the second input transmission line. 5. The distributed amplifier system of claim 4 , wherein the level shifting circuitry comprises a least one of an emitter follower amplifier or a source follower amplifier. 6. The distributed amplifier system of claim 5 , wherein the first output transmission line and the second input transmission line are coupled transmission lines. 7. The distributed amplifier system of claim 6 , wherein the first input transmission line is a single ended transmission line and the second output transmission line is a coupled transmission line. 8. The distributed amplifier system of claim 7 , wherein the distributed amplifier system is controllable to provide a gain of at least 18 decibels (dB). 9. The distributed amplifier system of claim 8 , wherein the first set of discrete gain settings are spaced apart by more than 3.0 dB and the second set of discrete gain settings are spaced apart by less than 1.0 dB. 10. The distributed amplifier system of claim 9 , wherein a range of the first set of discrete gain settings is at least 16 dB and a range of the second set of discrete gain settings is at least 3 dB. 11. The distributed amplifier system of claim 10 , wherein each of the first plurality of amplifiers is a transconductance amplifier. 12. The distributed amplifier system of claim 11 , wherein a first amplifier of the first plurality of amplifiers comprises a bipolar junction transistor (BJT) and the distributed amplifier system is configured to provide bandwidth from DC to greater than 33% of a maximum oscillation frequency of the BJT. 13. The distributed amplifier system of claim 12 , wherein the maximum oscillation frequency of the BJT is greater than 100 gigaHertz. 14. The distributed amplifier system of claim 13 , wherein the distributed amplifier system is further configured to provide a noise spectral density less than 1.5 nanovolts per square root Hertz. 15. The distributed amplifier system of claim 14 , wherein the distributed amplifier system is further configured to provide a total harmonic distortion less than −40 dB. 16. The distributed amplifier system of claim 15 , wherein at least one of the second plurality of amplifiers is further configured as a frequency peaking amplifier. 17. The distributed amplifier system of claim 16 , wherein at least two of the second plurality of amplifiers are further configured as frequency peaking amplifiers and the second stage TWA circuitry is controllable to provide one of a set of frequency peaking profiles. 18. The distributed amplifier system of claim 17 , wherein the first input transmission line is configured to provide a characteristic impedance of approximately 50 ohms. 19. The distributed amplifier system of claim 18 , wherein the first output transmission line, the second input transmission line, and the second output transmission line are each configured to provide a characteristic impedance between 25 ohms and 100 ohms. 20. The distributed amplifier system of claim 1 , wherein the distributed amplifier system is implemented within signal input circuitry of at least one of an oscilloscope, a spectrum analyzer, or a signal analyzer.

Assignees

Inventors

Classifications

  • Combined gain and bias control · CPC title

  • with semiconductor devices only · CPC title

  • the level shifting stage between two amplifying stages being realised by an emitter follower · CPC title

  • Differential amplifier with circuit arrangements to enhance the transconductance · CPC title

  • using bipolar transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10367463B2 cover?
Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparall…
Who is the assignee on this patent?
Keysight Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H03G1/0088. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).