Signal amplifier

US10367458B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10367458-B2
Application numberUS-201815933444-A
CountryUS
Kind codeB2
Filing dateMar 23, 2018
Priority dateMar 31, 2017
Publication dateJul 30, 2019
Grant dateJul 30, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A signal amplifier includes a pulse width modulator, a level shifter, and a power amplifier. The pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a GND. The power amplifier is driven by a positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND. The level shifter shifts a voltage level of a first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of a second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

First claim

Opening claim text (preview).

What is claimed is: 1. A signal amplifier, comprising: a signal input to which an analog input signal of a differential form is input; a pulse width modulator that performs pulse width modulation on the analog input signal input to the signal input to convert the analog input signal into a first pulse width modulation (PWM) signal; a level shifter that shifts a voltage level of the first PWM signal output from the pulse width modulator to convert the first PWM signal into a second PWM signal; a power amplifier that performs power amplification on the second PWM signal output from the level shifter to generate an analog output signal of a differential form from the second PWM signal; a signal output that outputs the analog output signal of a differential form; and an error amplifier to which the analog input signal is input and to which the analog output signal output from the signal output is input by being fed back and input to the error amplifier, wherein the error amplifier outputs an error amplification signal that is generated by amplifying an error component between the analog input signal input to the error amplifier and the analog output signal fed back and input to the error amplifier, the pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a ground (GND), the pulse width modulator outputs the first PWM signal having a pulse width corresponding to a signal level of the error amplification signal, the power amplifier is driven by the positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND, and the level shifter shifts the voltage level of the first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of the second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

Assignees

Inventors

Classifications

  • the amplifier being designed for audio applications · CPC title

  • of the bridge type · CPC title

  • using IC blocks as the active amplifying circuit · CPC title

  • with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title

  • using pulse width modulation · CPC title

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Frequently asked questions

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What does patent US10367458B2 cover?
A signal amplifier includes a pulse width modulator, a level shifter, and a power amplifier. The pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a GND. The power amplifier is driven by a positive power supply, and a reference voltage of the power amplifier is set to a middle value between the …
Who is the assignee on this patent?
Panasonic Ip Man Co Ltd, Panasonic Intellectual Property Manangement Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03F3/217. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).