System and method for a dual-core VCO

Patent metadata

Field	Value
Publication number	US-10367452-B2
Application number	US-201715461203-A
Country	US
Kind code	B2
Filing date	Mar 16, 2017
Priority date	Mar 16, 2017
Publication date	Jul 30, 2019
Grant date	Jul 30, 2019

Abstract

In accordance with an embodiment, a method of operating a voltage controlled oscillator (VCO) includes generating a first oscillating signal in a first VCO core and generating a second oscillating signal in a second VCO core, such that the first oscillating signal and the second oscillating signal have a same frequency and a fixed phase offset. The VCO includes the first VCO core and the second VCO core, and each VCO core includes a pair of transistors. The VCO also includes a transformer having a first winding coupled between control nodes of the pair of transistors of the first VCO core and a second winding coupled between control nodes of the pair of transistors of the second VCO core.

First claim

What is claimed is:

1. A method of operating a voltage controlled oscillator (VCO) comprising a first VCO core and a second VCO core that each includes a pair of transistors, and a transformer having a first winding coupled between control nodes of the pair of transistors of the first VCO core and a second winding coupled between control nodes of the pair of transistors of the second VCO core, wherein load path terminals of the pair of transistors of the first VCO core and load path terminals of the pair of transistors of the second VCO core are not directly coupled to each other, are not directly coupled to the first winding of the transformer, and are not directly coupled to the second winding of the transformer, the method comprising:
generating a first oscillating signal in the first VCO core; and
generating a second oscillating signal in the second VCO core, wherein the first oscillating signal and the second oscillating signal have a same frequency and a fixed phase offset.

2. The method of claim 1 , wherein the first VCO core and the second VCO core each comprises a Colpitts oscillator.

3. The method of claim 1 , further comprising buffering a fundamental frequency of the first oscillating signal from output nodes of the pair of transistors of the first VCO core or the second VCO core.

4. The method of claim 1 , further comprising buffering a second harmonic of the first oscillating signal from reference nodes of the pair of transistors of the first VCO core or the second VCO core.

5. A voltage controlled oscillator (VCO) comprising:
a first VCO core and a second VCO core, each VCO core including a pair of transistors and a capacitance coupled between control nodes of the pair of transistors; and
a transformer comprising
a first winding coupled between control nodes of the pair of transistors of the first VCO core, wherein an inductance of the first winding forms a tank inductance of the first VCO core, and
a second winding coupled between control nodes of the pair of transistors of the second VCO core, wherein an inductance of the second winding forms a tank inductance of the second VCO core, wherein load path terminals of the pair of transistors of the first VCO core and load path terminals of the pair of transistors of the second VCO core are not directly coupled to each other, are not directly coupled to the first winding of the transformer, and are not directly coupled to the second winding of the transformer.

6. The voltage controlled oscillator of claim 5 , wherein the transformer comprises a symmetrical transformer.

7. The voltage controlled oscillator of claim 5 , wherein the first VCO core, the second VCO core and the transformer are disposed on a same semiconductor substrate.

8. The voltage controlled oscillator of claim 5 , wherein the pairs of transistors of the first VCO core and the second VCO core comprise bipolar junction transistors.

9. The voltage controlled oscillator of claim 5 , wherein the pairs of transistors of the first VCO core and the second VCO core comprise metal oxide semiconductor (MOS) transistors.

10. The voltage controlled oscillator of claim 5 , wherein the capacitance of the first VCO core and the capacitance of the second VCO core each comprises a varactor.

11. The voltage controlled oscillator of claim 5 , wherein the first VCO core and the second VCO core each comprises a pair of varactors coupled to respective control nodes of the pair of transistors.

12. An integrated circuit comprising:
a semiconductor substrate;
a first voltage controlled oscillator (VCO) core disposed on the semiconductor substrate, the first VCO core comprising a first transistor, a second transistor, a first capacitor coupled between a reference node of the first transistor and a reference node of the second transistor, a second capacitor coupled between a control node of the first transistor and the reference node of the first transistor, and a third capacitor coupled between a control node of the second transistor and the reference node of the second transistor; and
a second VCO core disposed on the semiconductor substrate, the second VCO core comprising a third transistor, a fourth transistor, a fourth capacitor coupled between a reference node of the third transistor and a reference node of the fourth transistor, a fifth capacitor coupled between a control node of the third transistor and the reference node of the third transistor, and a sixth capacitor coupled between a control node of the second transistor and the reference node of the second transistor; and
a transformer disposed on the semiconductor substrate, the transformer comprising a first winding coupled between the control node of the first transistor and the control node of the second transistor, and a second winding coupled between the control node of the third transistor and the control node of the fourth transistor, wherein the first winding is magnetically coupled to the second winding, wherein the first VCO core, the second VCO core and the transformer form a voltage controlled oscillator, output terminals and reference nodes of the first transistor, second transistor, third transistor and fourth transistor are not directly coupled to each other, are not directly coupled to the first winding of the transformer and are not directly coupled to second winding of the transformer.

13. The integrated circuit of claim 12 , wherein the transformer comprises a symmetrical transformer.

14. The integrated circuit of claim 13 , wherein:
the first winding of the transformer comprises a first loop connected between a first connection of the first winding and a second connection of the first winding, and a first center tap connection connected at a center tap of the first winding, wherein the first connection and the second connection are disposed on a first side of the first loop and the first center tap connection is disposed on a second side of the first loop opposite the first side; and
the second winding of the transformer comprises a second loop connected between a third connection of the second winding and a fourth connection of the second winding, and a second center tap connection connected at a center tap of the second winding, wherein the third connection and the fourth connection are disposed on the second side of the second loop and the second center tap connection is disposed on the first side of the second loop, the first center tap connection is disposed between the third connection and the fourth connection, the second center tap connection is disposed between the first connection and the second connection, and the first winding is the same size as the second winding.

15. The integrated circuit of claim 12 , wherein the first transistor, the second transistor, the third transistor and the fourth transistor are bipolar junction transistors.

16. The integrated circuit of claim 12 , wherein the first transistor, the second transistor, the third transistor and the fourth transistor are metal oxide semiconductor (MOS) transistors.

17. The integrated circuit of claim 12 , further comprising a first buffer coupled to output nodes of the first transistor and the second transistor of the first VCO core, the first buffer configured to output a fundamental frequency of the voltage controlled oscillator.

18. The integrated circuit of claim 12 , further comprising a second buffer coupled to reference nodes of the first transistor and the second transistor of the first VCO core, the second buffer configured to output twice fundamental frequency of the voltage controlled oscillato

Assignees

• Infineon Technologies Ag

Inventors

• Issakov Vadim
• Padovan Fabio

Classifications

• H03B5/1296

  the feedback circuit comprising a transformer · CPC title

• H03B5/1293

  having means for achieving a desired tuning characteristic, e.g. linearising the frequency characteristic across the tuning voltage range · CPC title

• H03B2200/004

  including a variable capacitance, e.g. a varicap, a varactor or a variable capacitance of a diode or transistor · CPC title

• H03B5/1231 Primary

  the amplifier comprising one or more bipolar transistors · CPC title

• H03B5/1243

  the means comprising voltage variable capacitance diodes · CPC title