Electronic device and method for driving display thereof

US10366669B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10366669-B2
Application numberUS-201715454270-A
CountryUS
Kind codeB2
Filing dateMar 9, 2017
Priority dateMar 9, 2016
Publication dateJul 30, 2019
Grant dateJul 30, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device is provided, which includes a display, a processor configured to generate a plurality of frame images including a first frame image and a second frame image to be provided to the display, and a display driving circuit including an image processor and a memory, and configured to drive the display using the first frame image and the second frame image that are provided from the processor. The display driving circuit is configured to compare the second image frame to the first image frame, to display, through the display, a third image frame obtained through the image processor, the image processor processing the first image frame or the second image frame using an image processing scheme if the second image frame satisfies a first condition, to store the third image frame in the memory and to display the stored third image frame through the display if the second image frame satisfies a second condition.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device comprising: a display; a processor configured to generate a plurality of encoded frame images, including a first encoded frame image, to be provided to the display; and a display driving circuit including an image-process circuit, a memory, and at least one decoder, the image-process circuit being downstream of the memory, the display driving circuit being configured to drive the display using the first encoded frame image provided from the processor, wherein the display driving circuit is further configured to: receive the first encoded frame image, provided from the processor, and store the first encoded frame image in the memory; generate a first decoded frame image by decoding the first encoded frame image after receiving and storing the first encoded frame image, generate a first image-processed frame image by image-processing the first decoded frame image after generating the first decoded frame image, cause to display, through the display, the first image-processed frame image as a first frame, generate a second encoded frame image by encoding the first image-processed frame image, and store the second encoded frame image in the memory, generate a second decoded frame image by decoding the second encoded frame image after storing the second encoded frame image, after generating the second decoded frame image, cause to display the second decoded frame image as a second frame through the display, without image-processing the second decoded frame image, while the processor is in a low-power state. 2. The electronic device of claim 1 , wherein the display driving circuit is configured to: compare at least a part of the first encoded frame image to at least a part of a third encoded frame image received from the processor, and determine that a first condition indicating that the electronic device is in a normal power state is satisfied if it is determined that the at least a part of the first encoded frame image is not the same as the at least a part of the third encoded frame image. 3. The electronic device of claim 2 , wherein the display driving circuit is configured to determine that a second condition indicating that the electronic device is in the low power state is satisfied if the first condition is not satisfied. 4. The electronic device of claim 3 , wherein the display driving circuit is configured to bypass the image-process circuit if the second condition is satisfied. 5. The electronic device of claim 2 , wherein the display driving circuit is configured to control the image-process circuit to not provide an image-processed frame image directly to the display if the second condition is satisfied. 6. The electronic device of claim 1 , wherein the display driving circuit is configured to: compare the first encoded frame image to the a third encoded frame image received from the processor, and to determine that a first condition indicating that the electronic device is in a normal power state is satisfied if it is determined that the first encoded frame image is not the same as the third encoded frame image. 7. The electronic device of claim 1 , wherein the image-process circuit is configured to process the first decoded frame image to provide at least one of: noise removal, contrast ratio control, color sense increase, and picture quality improvement. 8. The electronic device of claim 1 , wherein the display driving circuit is configured to bypass the image-process circuit if the electronic device is in a low-power state. 9. A method for driving a display of an electronic device, including a display, a processor configured to generate a plurality of encoded frame images including a first encoded frame image to be provided to the display, and a display driving circuit including an image-process circuit, a memory, and at least one decoder, wherein the image-process circuit is downstream of the memory, the method comprising: receiving the first encoded frame image, provided from the processor, and storing the first encoded frame image in the memory; generating a first decoded frame image by decoding the first encoded frame image after receiving and storing the first encoded frame image; generating a first image-processed frame image by image-processing the first decoded frame image after generating the first decoded frame image; displaying, through the display, the first image-processed frame image as a first frame; generating a second encoded frame image by encoding the first image-processed frame image, and storing the second encoded frame image in the memory, generating a second decoded frame image by decoding the second encoded frame image after storing the second encoded frame image, after generating the second decoded frame image, displaying the second decoded frame image as a second frame through the display, without image-processing the second decoded frame image, while the processor is in a low-power state. 10. The method of claim 9 , further comprising: comparing at least a part of the first encoded frame image to at least a part of the a third encoded frame image receive from the processor; and determining that a first condition indicating that the electronic device is in a normal power state is satisfied if it is determined that the at least a part of the first encoded frame image is not the same as the at least a part of the third encoded frame image. 11. The method of claim 10 , further comprising determining that a second condition indicating that the electronic device is in the low power state is satisfied if the first condition is not satisfied. 12. The method of claim 11 , further comprising bypassing the image-process circuit if the second condition satisfied. 13. The method of claim 10 , further comprising controlling the image-process circuit to not provide an image-processed frame image directly to the display if the second condition is satisfied. 14. The method of claim 9 , further comprising: comparing the first encoded frame image to the third encoded frame image; and determining that a first condition indicating that the electronic device is in a normal power state is satisfied if it is determined that the first encoded frame image is not the same as the third encoded frame image. 15. The method of claim 9 , wherein image-processing by the image-process circuit comprises at least one of: frame image noise removal, contrast ratio control, color sense increase, and picture quality improvement. 16. The method of claim 9 , further comprising bypassing the image-process circuit if the electronic device is in a low-power state. 17. A non-transitory computer readable recording medium storing therein one or more programs including instructions, which when executed by a processor, cause an electronic device, including a display, a processor configured to generate a plurality of encoded frame images including a first encoded frame image to be provided to the display, and a display driving circuit including an image-process circuit, a memory and at least one decoder, wherein the image-process circuit is downstream of the memory, to perform operations comprising: receiving the first encoded frame image, provided from the processor, and storing the first encoded frame image in the memory; generating a first decoded frame image by decoding the first encoded frame image after receiving and storing the first encoded frame image; generating a first image-processed frame image by image-processing the first decoded frame image after generating a first decoded frame image; displayi

Assignees

Inventors

Classifications

  • G09G5/001Primary

    Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor · CPC title

  • Power management, e.g. power saving · CPC title

  • Detection of image changes, e.g. determination of an index representative of the image change · CPC title

  • Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto (specific for a CRT G09G1/165; for a flat panel G09G3/2092) · CPC title

  • Handling of images in compressed format, e.g. JPEG, MPEG · CPC title

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What does patent US10366669B2 cover?
An electronic device is provided, which includes a display, a processor configured to generate a plurality of frame images including a first frame image and a second frame image to be provided to the display, and a display driving circuit including an image processor and a memory, and configured to drive the display using the first frame image and the second frame image that are provided from t…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G5/001. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).