Digital Triggering Using Finite State Machines
US-2016085223-A1 · Mar 24, 2016 · US
US10365300B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10365300-B2 |
| Application number | US-201615395593-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 30, 2016 |
| Priority date | Feb 5, 2016 |
| Publication date | Jul 30, 2019 |
| Grant date | Jul 30, 2019 |
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This disclosure relates generally to test and measurement instruments structured to detect that a series of events occurred, and structured to generate a trigger signal in response to detecting that a final event in the series of events occurred. The trigger may be generated based on a timeout signal, or based on another event, trigger, or signal. Stored data in the acquisition memory may be marked relative to the detection of the final event. An external forced timeout signal may control which in a series of events is marked as a final event. The triggering on final event may be enabled after another trigger is satisfied, and may be used as one of many different types of triggers.
Opening claim text (preview).
What is claimed is: 1. A test and measurement instrument comprising: an input circuit configured for receiving one or more input signals; an analog-to-digital converter configured for converting an input signal of the one or more input signals to a digital signal; an acquisition memory structured to store the digital signal; and a trigger subsystem having one or more event decoders operative responsive to one or more features of the one or more input signals or the digital signal to detect that a series of events occurred, and structured to generate a trigger signal in response to detecting that a final event in the series of events occurred, wherein the series of events is a series of recurring events, and a total number of recurring events in the series of events is unknown to the trigger subsystem prior to the detection of the occurrence of the final event in the series of events. 2. The test and measurement instrument according to claim 1 , in which the trigger subsystem includes a trigger-on-final-event timer to store a final event duration, and in which generating the trigger signal occurs when no event of the series of events occurs within the final event duration after the occurrence of the last previously determined event in the series of events. 3. The test and measurement instrument according to claim 2 , in which the trigger-on-final-event timer begins timing when an event is detected, and in which generating the trigger signal is suppressed when an event in the series of events is detected before the trigger-on-final-event timer expires. 4. The test and measurement instrument according to claim 3 , in which the trigger-on-final-event timer is reset when an event in the series of events is detected. 5. The test and measurement system according to claim 2 in which the trigger-on-final-event timer is crystal controlled. 6. The test and measurement instrument according to claim 1 , further comprising a timestamp indicator structured to indicate a timestamp associated to a particular portion of the data stored in the acquisition memory when the trigger signal is generated. 7. The test and measurement instrument according to claim 6 , in which the timestamp is associated to a portion of the data related to the final event in the series of events. 8. The test and measurement instrument according to claim 6 , in which the trigger subsystem includes a trigger-on-final-event timer to store a final event duration, and in which the timestamp is generated by subtracting the final event duration from a time when a timeout was determined to have occurred. 9. The test and measurement instrument according to claim 6 , in which the timestamp indicator locates an approximate location of the final event in the stored digital data, and further comprising a correction facility structured to analyze the stored digital data to determine a specific location of the final event in the stored digital data. 10. The test and measurement instrument according to claim 1 , in which the trigger subsystem includes an input structured to receive a forced timeout signal, and in which, when the forced timeout signal is received, the trigger subsystem indicates the final event in the series of events is the event most previously received before the forced timeout signal was received. 11. The test and measurement instrument according to claim 1 in which the digital data stored in the acquisition memory is marked with a temporary timestamp at detected events in the series of events. 12. The test and measurement instrument according to claim 1 , in which the trigger system is structured to detect a first triggering event in the input signal or the digital signal before enabling the detection of the series of events. 13. A processor controlled method of generating a trigger in a test and measurement instrument, the method comprising: accepting an input signal by an input circuit; digitizing, by an analog-to-digital converter, the input signal into a digital signal; storing the digital signal in an acquisition memory; evaluating, by a trigger subsystem, the input signal or the digital signal for events in a series of events; and generating, by the trigger subsystem, the trigger when a final event in the series of events is detected, wherein the series of events is a series of recurring events, and a total number of recurring events in the series of events is unknown to the trigger subsystem prior to the detection of the occurrence of the final event in the series of events. 14. The method according to claim 13 , in which generating the trigger comprises: starting a timer when an event in the series of events is detected; and generating the trigger if the timer finishes before detecting a next event in the series of events. 15. The method according to claim 14 , in which the timer is a crystal controlled timer. 16. The method according to claim 13 , further comprising indicating a timestamp in relation to the acquisition memory when the final event in the series of events occurs. 17. The method according to claim 16 further comprising refining a location of the timestamp by evaluating data stored in the acquisition memory. 18. The method according to claim 14 , further comprising: detecting the final event in the series of events; and generating a timestamp in the acquisition memory by subtracting a period of time stored in the timer from a point in time when the final event in the series of events was detected. 19. The method according to claim 13 , further comprising receiving a forced timeout signal, and in which an event of the series of events received prior to receiving the forced timeout signal is deemed to be the final event in the series of events. 20. The method according to claim 13 , in which the series of events are not evaluated for a final event until another event occurs, the other event unrelated to the series of events.
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