Method of inspecting semiconductor wafer, an inspection system for performing the same, and a method of fabricating semiconductor device using the same
US-2018053292-A1 · Feb 22, 2018 · US
US10365232B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10365232-B2 |
| Application number | US-201815939278-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 29, 2018 |
| Priority date | May 15, 2017 |
| Publication date | Jul 30, 2019 |
| Grant date | Jul 30, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Methods and systems for transforming positions of defects detected on a wafer are provided. One method includes aligning output of an inspection subsystem for a first frame in a first swath in a first die in a first instance of a multi-die reticle printed on the wafer to the output for corresponding frames, swaths, and dies in other reticle instances printed on the wafer. The method also includes determining different swath coordinate offsets for each of the frames, respectively, in the other reticle instances based on the swath coordinates of the output for the frames and the corresponding frames aligned thereto and applying one of the different swath coordinate offsets to the swath coordinates reported for the defects based on the other reticle instances in which they are detected thereby transforming the swath coordinates for the defects from swath coordinates in the other reticle instances to the first reticle instance.
Opening claim text (preview).
What is claimed is: 1. A system configured to transform positions of defects detected on a wafer, comprising: an inspection subsystem comprising at least an energy source and a detector, wherein the energy source is configured to generate energy that is directed to a wafer, wherein the detector is configured to detect energy from the wafer and to generate output responsive to the detected energy, wherein the output comprises multiple swaths of frames of output for each of multiple dies on the wafer, and wherein each of multiple instances of a reticle printed on the wafer comprises at least two instances of the multiple dies; and one or more computer subsystems configured for: detecting defects on the wafer by applying a defect detection method to the output generated by the detector, wherein positions of the defects are reported by the defect detection method in swath coordinates; aligning the output for a first of the frames in a first of the multiple swaths in a first of the multiple dies in a first of the multiple instances of the reticle printed on the wafer to the output for corresponding others of the frames in corresponding others of the multiple swaths in corresponding others of the multiple dies in others of the multiple instances of the reticle printed on the wafer, determining different swath coordinate offsets for each of the frames, respectively, in the others of the multiple instances of the reticle based on differences between swath coordinates of the output for the frames and swath coordinates of the output for the first of the frames aligned thereto in the aligning step; and applying one of the different swath coordinate offsets to the swath coordinates reported for the defects detected on the wafer, wherein which of the different swath coordinate offsets is applied to the swath coordinates reported for the defects is determined based on the others of the multiple instances of the reticle in which the defects were detected, thereby transforming the swath coordinates reported for the defects from swath coordinates in the others of the multiple instances of the reticle to swath coordinates in the first of the multiple instances of the reticle. 2. The system of claim 1 , wherein the one or more computer subsystems are further configured for performing said aligning, said determining, and said applying without design information for devices being formed on the wafer. 3. The system of claim 1 , wherein the one or more computer subsystems are not configured to perform any steps using design information for devices being formed on the wafer. 4. The system of claim 1 , wherein the one or more computer subsystems are further configured for determining if the defects are repeater defects based on the transformed swath coordinates for the defects. 5. The system of claim 1 , wherein the one or more computer subsystems are further configured for determining if the defects are caused on the wafer by the reticle used to print patterned features on the wafer based on the transformed swath coordinates for the defects. 6. The system of claim 1 , wherein the one or more computer subsystems are further configured for determining if the defects are caused on the wafer by the reticle used to print patterned features on the wafer based on the transformed swath coordinates for the defects, and wherein the reticle is an extreme ultraviolet reticle. 7. The system of claim 1 , wherein the output for the first of the frames used in the aligning step is output for an alignment target in the first of the frames, wherein the output for the corresponding others of the frames used in the aligning step is output for alignment sites in the corresponding others of the frames, wherein the one or more computer subsystems are further configured for selecting alignment targets in the frames in the first of the multiple swaths in the first of the multiple instances of the reticle, and wherein said selecting the alignment targets comprises selecting at least one of the alignment targets in each of the frames in the first of the multiple swaths in the first of the multiple instances of the reticle. 8. The system of claim 1 , wherein the output for the first of the frames used in the aligning step is output for an alignment target in the first of the frames, wherein the output for the corresponding others of the frames used in the aligning step is output for alignment sites in the corresponding others of the frames, and wherein the one or more computer subsystems are further configured for selecting alignment targets in the frames in the multiple swaths in the first of the multiple instances of the reticle, separating the selected alignment targets into groups based on the multiple swaths in which they are located such that each of the groups corresponds to fewer than all of the multiple swaths, and storing information for the selected alignment targets in the groups into different portions of the one or more computer subsystems based on which of the different portions of the one or more computer subsystems perform said detecting, said aligning, said determining, and said applying for different ones of the groups, respectively. 9. The system of claim 1 , wherein the output for the first of the frames used in the aligning step is output for an alignment target in the first of the frames, wherein the output for the corresponding others of the frames used in the aligning step is output for alignment sites in the corresponding others of the frames, and wherein the one or more computer subsystems are further configured for selecting alignment targets in the frames in the multiple swaths in the first of the multiple instances of the reticle from the output generated for the wafer by the detector while the inspection subsystem directs the generated energy to the wafer and the detector detects the energy from the wafer for an inspection scan. 10. The system of claim 1 , wherein the output for the first of the frames used in the aligning step is output for an alignment target in the first of the frames, wherein the output for the corresponding others of the frames used in the aligning step is output for alignment sites in the corresponding others of the frames, and wherein the one or more computer subsystems are further configured for selecting alignment targets in the frames in the multiple swaths in one of the multiple instances of the reticle from output generated for the wafer by the detector in a setup scan of only the one of the multiple instances of the reticle performed before the detector of the inspection subsystem generates the output used to detect the defects on the wafer, generating a data structure containing information for the selected alignment targets, and storing the data structure in a non-transitory computer-readable storage medium. 11. The system of claim 1 , wherein the output for the first of the frames used in the aligning step is output for an alignment target in the first of the frames, wherein the output for the corresponding others of the frames used in the aligning step is output for alignment sites in the corresponding others of the frames, and wherein the one or more computer subsystems are further configured for selecting alignment targets in the frames in the multiple swaths in one of the multiple instances of the reticle from output generated for the wafer by the detector in a setup scan of only the one of the multiple instances of the reticle performed before the detector of the inspection subsystem generates the output used to detect the defects on the wafer, generating a data structure containing only location information for the selected alignment targets, and storing the data structure in a non-transitory comp
Determining coordinates of flaws · CPC title
flaws, defects · CPC title
semiconductor wafer · CPC title
using incident electron beams, e.g. scanning electron microscopy [SEM] · CPC title
using a comparative method · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.