Switching circuitry, DC-interface and method for operating a switching circuitry

Patent metadata

Field	Value
Publication number	US-10361694-B2
Application number	US-201715783718-A
Country	US
Kind code	B2
Filing date	Oct 13, 2017
Priority date	Nov 24, 2016
Publication date	Jul 23, 2019
Grant date	Jul 23, 2019

Abstract

A switching circuitry is configured to provide, during an ON-State, a connection between a first port and second port and to electrically disconnect, during an OFF-State, the first port from the second port. The switching interface comprises a first and a second cascode transistor element having an applicable operational voltage and comprising a control terminal, wherein the first cascode transistor element is connected with the first port of the switching interface and wherein the second cascode transistor element is connected with the second port of the switching interface. The switching interface comprises a switching transistor element, having the applicable operational voltage and comprising a third control terminal, the switching transistor element being serially connected the first and second cascode transistor elements. A supply signal arrangement is connected to the control terminals and configured to provide control voltages to the control terminals.

First claim

The invention claimed is:

1. A switching circuitry to provide, during an ON-State, a connection between a first port for receiving an input voltage and a second port and to electrically disconnect, during an OFF-State, the first port from the second port, the switching circuitry comprising:
a first cascode transistor element having an applicable operational voltage and comprising a first control terminal, the first cascode transistor element being connected with the first port of the switching circuitry; and
a second cascode transistor element also having the applicable operational voltage and comprising a second control terminal, the second cascode transistor element being connected with the second port of the switching circuitry;
a switching transistor element also having the applicable operational voltage and comprising a third control terminal, the switching transistor element being serially connected between the first and second cascode transistor elements; and
a supply signal arrangement directly connected to the first control terminal, the second control terminal, and the third control terminal, wherein the supply signal arrangement is configured to provide a first control voltage to the first control terminal, to provide a second control voltage to the second control terminal and to provide a third control voltage to the third control terminal;
wherein the first cascode transistor element is connected to a first adjusting circuitry, the first adjusting circuitry being connected between the first control terminal and a reference potential node and being configured to adjust the first control voltage, so that, during the ON-State, the voltage difference between the first control voltage and the input voltage is less than or equal to the applicable operational voltage;
wherein the second cascode transistor element is connected to a second adjusting circuitry, the second adjusting circuitry being connected between the second control terminal and the reference potential node and being configured to adjust the second control voltage, so that, during the ON-State, the voltage difference between the second control voltage and the input voltage is less than or equal to the applicable operational voltage;
wherein the switching transistor element is connected to a third adjusting circuitry, the third adjusting circuitry being connected between the third control terminal and the reference potential node and being configured to adjust the third control voltage, so that, during the ON-State, the voltage difference between the third control voltage and the input voltage is less than or equal to the applicable operational voltage; and
wherein a maximum voltage level of the input voltage is higher than the applicable operational voltage.

2. The switching circuitry of claim 1 , wherein the first adjusting circuitry is configured to adjust the first control voltage, so that, during the OFF-State, the voltage difference between the first control voltage and the input voltage is less than or equal to the applicable operational voltage;
wherein the second adjusting circuitry is configured to adjust the second control voltage, so that, during the OFF-State, the voltage difference between the second control voltage and the input voltage is less than or equal to the applicable operational voltage; and
wherein the third adjusting circuitry is configured to adjust the third control voltage, so that, during the OFF-State, the voltage difference between the third control voltage and the input voltage is less than or equal to the applicable operational voltage.

3. The switching circuitry of claim 1 , wherein the applicable operational voltage is higher within a tolerance range than a recommended operational voltage of the first cascode transistor element, the second cascode transistor element, and the switching transistor element, wherein the tolerance range is at most 35% of the recommended operational voltage.

4. The switching circuitry of claim 1 , wherein the first adjusting circuitry comprises a first source follower having a first resistive element, wherein, during the ON-State, a voltage drop over the first resistive element adjusts the first control voltage;
wherein the second adjusting circuitry comprises a second source follower having a second resistive element, wherein, during the ON-State, a voltage drop over the second resistive element adjusts the second control voltage;
wherein the third adjusting circuitry comprises a third source follower having a third resistive element, wherein, during the ON-State, a voltage drop over the third resistive element adjusts the third control voltage.

5. The switching circuitry of claim 1 , wherein the supply signal arrangement comprises a charge pump circuitry.

6. The switching circuitry of claim 4 , wherein the supply signal arrangement comprises a charge pump circuitry further comprising a current mirror circuitry, wherein the current mirror circuitry comprises:
a first branch being connected to the first source follower and the second source follower, and
a second branch connected to the third source follower.

7. The switching circuitry of claim 1 ,
wherein the first adjusting circuitry comprises a fourth transistor element, wherein, during the OFF-State, the fourth transistor element is connected between the first control terminal and the reference potential node;
wherein the second adjusting circuitry comprises a fifth transistor element, wherein, during the OFF-State, the fifth transistor element is connected between the second control terminal and the reference potential node; and
wherein the third adjusting circuitry comprises a sixth transistor element, wherein, during the OFF-State, the sixth transistor element is connected between the third control terminal and the reference potential node.

8. The switching circuitry of claim 7 ,
wherein the fourth transistor element and the first cascode transistor element have complementary transistor types;
wherein the fifth transistor element and the second cascode transistor element have complementary transistor types;
wherein the sixth transistor element and the switching transistor element have a same transistor type.

9. The switching circuitry of claim 7 , wherein the fourth transistor element comprises a fourth control terminal, wherein the fifth transistor element comprises a fifth control terminal and wherein the sixth transistor element comprises a sixth control terminal, wherein, during the OFF-State, the fourth, fifth and sixth control terminals are connected with a voltage level which corresponds to an applicable operational voltage of the fourth, fifth and sixth transistor elements.

10. The switching circuitry of claim 1 , wherein the first cascode transistor element, the second cascode transistor element, and the switching transistor element have the same conductivity type.

11. The switching circuitry of claim 1 , wherein the first cascode transistor element, the second cascode transistor element, and the switching transistor element are implemented by an identical transistor type.

12. The switching circuitry of claim 1 , wherein the switching transistor element is implemented as a T-GATE circuit.

13. The switching circuitry of claim 1 , wherein the first cascode transistor element, the second cascode transistor element and the switching transistor element are implemented as double gate oxide transistors.

14. The switching circuitry of claim 1 , wherein the first cascode transistor element, the second cascode transistor element and the switching transistor element comprise 2.5 V as a recommended operational voltage.

Assignees

• Infineon Technologies Ag

Inventors

• Bogner Peter
• Wappis Herwig

Classifications

• H03K2217/0081

  Power supply means, e.g. to the switch driver · CPC title

• H03K17/08104 Primary

  in field-effect transistor switches (H03K17/0812, H03K17/0814 take precedence) · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H03K17/08 Primary

  Modifications for protecting switching circuit against overcurrent or overvoltage · CPC title

• H03K2217/0063

  High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load · CPC title