Driving device for a display panel, display device and driving method of display panel

US10360836B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10360836-B2
Application numberUS-201715849749-A
CountryUS
Kind codeB2
Filing dateDec 21, 2017
Priority dateJul 21, 2017
Publication dateJul 23, 2019
Grant dateJul 23, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A driving device for a display panel, a display device and a driving method of a display panel are provided. The driving device for a display panel includes numerous sub-pixels. Each of the sub-pixels includes a first display region, a second display region, a first scanning line and a second scanning line. The first scanning line and the first display regions are connected. The second scanning line and the second display regions are connected. The driving device for a display panel further includes a gate driving unit. The gate driving unit is connected to the first scanning line and the second scanning line. The gate driving unit respectively controls charging times of the first display region and the second display region by the first scanning line and the second scanning line.

First claim

Opening claim text (preview).

What is claimed is: 1. A driving device for a display panel comprising: a plurality of sub-pixels, wherein each of the plurality of sub-pixels comprises a first display region and a second display region; a first scanning line and a second scanning line, wherein the first scanning line is connected to the first display regions of the plurality of sub-pixels, and the second scanning line is connected to the second display regions of the plurality of sub-pixels; at least one gate driving unit, individually connected to the first scanning line and the second scanning line; wherein the gate driving unit is configured to control charging times of the first display regions and the second display regions respectively through the first scanning line and the second scanning line and thereby to control grayscale displays of the first display regions and the second display regions; wherein the gate driving unit comprises a timing controller and an output enable controller connected to the timing controller, and the timing controller is configured to control duty ratios of high level scanning signals; wherein the timing controller is further configured to control the charging times of the first display region and the second display region respectively through adjusting the duty ratios of the high level scanning signals; wherein the timing controller is further configured to make the output enable controller to output control signals by controlling the duty ratios of the high level scanning signals, and the control signals are configured to control the first display region and the second display region to be charged or powered off; wherein the output enable controller comprises a first field effect transistor and a second field effect transistor; wherein a source electrode of the first field effect transistor is connected to a gate electrode of the second field effect transistor, the source electrode of the first field effect transistor and the gate electrode of the second field effect transistor are connected to a power supply, a drain electrode of the first field effect transistor and a drain electrode of the second field effect transistor are grounded; wherein a gate electrode of the first field effect transistor is configured to be inputted with a signal outputted from the timing controller, and the signal is the high level scanning signal with the adjusted duty ratio. 2. The driving device for a display panel according to claim 1 , wherein the gate driving unit further comprises a voltage converting circuit, and the voltage converting circuit is connected to the output enable controller; the voltage converting circuit is configured to convert the control signals outputted from the output enable controller into scanning voltages for controlling the first display region and the second display region to be charged. 3. The driving device for a display panel according to claim 1 , wherein the driving device for a display panel comprises a source driving unit for outputting a data signal, and the source driving unit is configured to output the data signal to charge the first display region and the second display region of each of the plurality of sub-pixels, the gate driving unit is configured to control times of the data signal charging the first display region and the second display region respectively by the first scanning line and the second scanning line. 4. The driving device for a display panel according to claim 3 , wherein the first display regions and the second display regions of the plurality of sub-pixels respectively are disposed with a first switch and a second switch for controlling charges of the first display region and the second display region, the first switch and the second switch respectively are connected to the first scanning line and the second scanning line, the gate driving unit is configured to control the first switch and the second switch to be turned on or off respectively by the first scanning line and the second scanning line. 5. The driving device for a display panel according to claim 4 , wherein the source driving unit is disposed with a data line, the data line is connected to a source electrode of the first switch and a source electrode of the second switch in each of the plurality of sub-pixels, the gate driving unit is configured to control the first switch or the second switch to be turned on and thereby to make the source driving unit to charge the first display region and the second display region through the data line. 6. A driving device for a display panel comprising: a plurality of sub-pixels, wherein each of the plurality of sub-pixels comprises a first display region and a second display region; a gate driving unit, wherein the gate driving unit comprises a timing controller, an output enable controller and a voltage converting circuit, the timing controller, the output enable controller and the voltage converting circuit are electrically connected in sequence; a first scanning line and a second scanning line, wherein an end of the first scanning line is connected to the first display regions of the plurality of sub-pixels, and another end of the first scanning line is electrically connected to the voltage converting circuit, an end of the second scanning line is connected to the second display regions of the plurality of sub-pixels, and another end of the second scanning line is electrically connected to the voltage converting circuit; a source driving unit, wherein the source driving unit is configured to output a data signal; a data line, wherein an end of the data line is connected to the source driving unit, and another end of the data line is connected to the first display region and the second display region; wherein the data signal outputted from the source driving unit charges the first display region and the second display region through the data line, the gate driving unit controls times of the data signal charging the first display region and the second display region respectively through the first scanning line and the second scanning line; wherein the output enable controller comprises a first field effect transistor and a second field effect transistor; wherein a source electrode of the first field effect transistor is connected to a gate electrode of the second field effect transistor, the source electrode of the first field effect transistor and the gate electrode of the second field effect transistor are connected to a power supply, a drain electrode of the first field effect transistor and a drain electrode of the second field effect transistor are grounded; wherein a gate electrode of the first field effect transistor is configured to be inputted with a signal outputted from the timing controller, and the signal is a high level scanning signal with an adjusted duty ratio. 7. A driving method of a display panel, comprising: controlling switches of a first display region and a second display region of a sub-pixel to be turned on through a gate driving unit; after the switches of the first display region and the second display region are turned on, charging the first display region and the second display region through a source driving unit; controlling times to turn off the switches of the first display region and the second display region through the gate driving unit, and thereby times of charging the first display region and the second display region through the source driving unit are controlled; wherein the gate driving unit comprises a timing controller and an output enable controller connected to the timing controller, and the timing controller is configured to control duty ratios of high level scanning signals; wherein the timing controller is further configured to control charging times of the first dis

Assignees

Inventors

Classifications

  • Compensation of deficiencies in the appearance of colours · CPC title

  • Precharge or discharge of pixel before applying new pixel voltage · CPC title

  • suitable for active matrices only · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • Layout of electrodes and connections · CPC title

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What does patent US10360836B2 cover?
A driving device for a display panel, a display device and a driving method of a display panel are provided. The driving device for a display panel includes numerous sub-pixels. Each of the sub-pixels includes a first display region, a second display region, a first scanning line and a second scanning line. The first scanning line and the first display regions are connected. The second scanning…
Who is the assignee on this patent?
Hkc Corp Ltd, Chongqing Hkc Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/2077. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 23 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).