Solid-state light source dimming system and techniques

US10356866B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10356866-B2
Application numberUS-201916267528-A
CountryUS
Kind codeB2
Filing dateFeb 5, 2019
Priority dateAug 4, 2017
Publication dateJul 16, 2019
Grant dateJul 16, 2019

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Abstract

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A device controls the dimming of a solid-state light source. The device includes a microcontroller configured to receive a rectified phase-cut signal. The microcontroller is configured to measure, within a given period, a duration of a low state of the rectified phase-cut signal and output a low value based thereon. The microcontroller is also configured to measure, within the given period, a duration of a high state of the rectified phase-cut signal and output a high value based thereon. The microcontroller generates an output signal based on at least one of the low value and the high value.

First claim

Opening claim text (preview).

What is claimed is: 1. A device for controlling the dimming of a solid-state light source, the device comprising: a microcontroller configured to receive a rectified phase-cut signal, wherein the microcontroller is configured to: measure, within a given period, a duration of a low state of the rectified phase-cut signal and output a low value based thereon; measure, within the given period, a duration of a high state of the rectified phase-cut signal and output a high value based thereon; and generate an output signal based on at least one of the low value and the high value. 2. The device of claim 1 , wherein the output signal is a pulse-width modulation (PWM) signal. 3. The device of claim 2 , wherein the microcontroller is further configured to: compare the low value and the high value against an accepted low value and an accepted high value, respectively; and generate the PWM signal based on at least one of the low value, the high value, the accepted low value, and the accepted high value. 4. The device of claim 3 , wherein the microcontroller is further configured to: store the accepted low value and the accepted high value of the rectified phase-cut signal; compare the low value against a half-cycle period of the rectified phase-cut signal; compare the high value against the half-cycle period of the rectified phase-cut signal; reset the low value with the accepted low value if the low value exceeds the accepted low value; and reset the high value with the accepted high value if the high value exceeds the accepted high value. 5. The device of claim 2 , wherein the microprocessor is further configured to communicate with a remote external device, wherein the microcontroller is further configured to generate the PWM signal based on input received via the remote external device. 6. The device of claim 1 , wherein the rectified signal is received from an input circuit and AC rectifier configured to receive the phase-cut AC signal from a phase-cut dimmer. 7. The device of claim 6 , further comprising: an isolation element electrically coupled in series with the input circuit and AC rectifier; a conditioning diode electrically coupled in series with the isolation element; and an isolation diode electrically coupled in series with the input circuit and AC rectifier and in parallel with the isolation element. 8. The device of claim 1 , wherein the microcontroller is configured to utilize zero-crossing detection in measuring each of the duration of the low state and the duration of the high state of the rectified phase-cut signal. 9. The device of claim 1 , wherein: the duration of the low state is measured starting at a falling edge of the rectified phase-cut signal; and the duration of the high state is measured starting at a rising edge of the rectified phase-cut signal. 10. The device of claim 1 , further comprising a DC-to-DC converter configured to: receive a rectified DC power; receive the signal from the microcontroller; and generate at least one DC power based on the rectified DC power and the signal and supply the at least one DC power to the solid-state light source. 11. A method of controlling light output of a solid-state light source, the method comprising: measuring a duration of each of a low state and a high state of a rectified phase-cut signal and outputting a corresponding low value and high value, respectively; generating a pulse-width modulation (PWM) signal based on each of the low value and the high value of the rectified phase-cut signal; and generating at least one direct current (DC) power based on the PWM signal and supplying the at least one DC power to the solid-state light source. 12. The method of claim 11 , further comprising an input circuit and AC rectifier configured to receive a phase-cut AC signal from a phase-cut dimmer and output the rectified phase-cut signal. 13. The method of claim 12 , further comprising: an isolation element electrically coupled in series with the input circuit and AC rectifier; a conditioning diode electrically coupled in series with the isolation element; and an isolation diode electrically coupled in series with the input circuit and AC rectifier and in parallel with the isolation element. 14. The method of claim 11 , wherein measuring the duration of each of the low state and the high state of the rectified phase-cut signal and outputting the corresponding low value and high value are performed via a microcontroller configured to receive the rectified phase-cut signal, wherein the microcontroller comprises: a timer module configured to: measure, within a given period, the duration of the low state and output the low value based thereon; and measure, within the given period, the duration of the high state and output the high value based thereon; and a half-cycle checking module configured to compare the low value and the high value against an accepted low value and an accepted high value, respectively. 15. The method of claim 14 , wherein generating the PWM signal based on each of the low value and the high value of the rectified phase-cut signal is performed via the microcontroller, wherein the microcontroller further comprises: a PWM module configured to generate the PWM signal based on at least one of the low value, the high value, the accepted low value, and the accepted high value. 16. The method of claim 14 , wherein the timer module is configured to utilize zero-crossing detection in measuring each of the duration of the low state and the duration of the high state of the rectified phase-cut signal. 17. The method of claim 14 , wherein the half-cycle checking module comprises: a storage module configured to store the accepted low value and the accepted high value of the rectified phase-cut signal; a comparing module configured to: compare the low value against a half-cycle period of the rectified phase-cut signal; and compare the high value against the half-cycle period of the rectified phase-cut signal; and a resetting module configured to: reset the low value with the accepted low value if the low value exceeds the accepted low value; and reset the high value with the accepted high value if the high value exceeds the accepted high value. 18. The method of claim 11 , wherein: the duration of the low state is measured starting at a falling edge of the rectified phase-cut signal; and the duration of the high state is measured starting at a rising edge of the rectified phase-cut signal.

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What does patent US10356866B2 cover?
A device controls the dimming of a solid-state light source. The device includes a microcontroller configured to receive a rectified phase-cut signal. The microcontroller is configured to measure, within a given period, a duration of a low state of the rectified phase-cut signal and output a low value based thereon. The microcontroller is also configured to measure, within the given period, a d…
Who is the assignee on this patent?
Zhang Shiyong, Ganick Aaron, Ledvance Llc
What technology area does this patent fall under?
Primary CPC classification H05B33/0845. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 16 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).